Datasheet

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SLAS412− DECEMBER 2003
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9
AUDIO INTERFACE TIMING DIAGRAMS
LRCK/ADWS
BCLK
DOUT
DIN
t
d
(WS)
t
d
(DO−WS)
t
d
(DO−BCLK)
t
s
(DI) t
h
(DI)
Figure 1. I
2
S/LJF/RJF Timing in Master Mode
TYPICAL TIMING REQUIREMENTS (FIGURE 1)
All specifications at 25°C, DVDD = 1.8 V
(1)
PARAMETER
IOVDD = 1.1 V IOVDD = 3.3 V
UNITS
PARAMETER
MIN MAX MIN MAX
UNITS
t
d
(WS) ADWS/LRCK delay 25 15 ns
t
d
(DO−WS) ADWS to DOUT delay (for LJF mode) 25 15 ns
t
d
(DO−BCLK) BCLK to DOUT delay 25 15 ns
t
s
(DI) DIN setup 6 6 ns
t
h
(DI) DIN hold 6 6 ns
t
r
Rise time 10 6 ns
t
f
Fall time 10 6 ns
(1)
These parameters are based on characterization and are not tested in production.
LRCK/ADWS
BCLK
DOUT
DIN
t
d
(WS)
t
d
(DO−BCLK)
t
s
(DI)
t
h
(DI)
t
d
(WS)
Figure 2. DSP Timing in Master Mode
TYPICAL TIMING REQUIREMENTS (FIGURE 2)
All specifications at 25°C, DVDD = 1.8 V
(1)
PARAMETER
IOVDD = 1.1 V IOVDD = 3.3 V
UNITS
PARAMETER
MIN MAX MIN MAX
UNITS
t
d
(WS) ADWS/LRCK delay 25 15 ns
t
d
(DO−BCLK) BCLK to DOUT delay 25 15 ns
t
s
(DI) DIN setup 6 6 ns
t
h
(DI) DIN hold 6 6 ns
t
r
Rise time 10 6 ns
t
f
Fall time 10 6 ns
(1)
These parameters are based on characterization and are not tested in production.