Datasheet
Table Of Contents
- Title Page - SLWS106H
- IMPORTANT NOTICE
- Contents
- List of Illustrations
- 1 Introduction
- 2 Specifications
- 2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range (unless otherwise noted)†
- 2.2 Recommended Operating Conditions
- 2.3 Electrical Characteristics Over Recommended Operating Conditions, AVDD, HPVDD, BVDD = 3.3 V, DVDD = 1.5 V, Slave Mode, XTI/ MCLK = 256fs, fs = 48 kHz ( unless otherwise stated)
- 2.4 Digital-Interface Timing
- 3 How to Use the TLV320AIC23B
- Appendix A: Mechanical Data
1−5
1.4 Ordering Information
PACKAGE
T
A
32-Pin
MicroStar Junior GQE/ZQE
28-Pin
TSSOP PW
28-Pin
PQFP RHD
−10°C to 70°C TLV320AIC23BGQE/ZQE TLV320AIC23BPW TLV320AIC23BRHD
−40°C to 85°C TLV320AIC23BIGQE/ZQE TLV320AIC23BIPW TLV320AIC23BIRHD
1.5 Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
GQE/
ZQE
PW RHD
I/O
DESCRIPTION
AGND 5 15 12 Analog supply return
AVDD 4 14 11 Analog supply input. Voltage level is 3.3 V nominal.
BCLK 23 3 28 I/O I
2
S serial-bit clock. In audio master mode, the AIC23B generates this signal and sends it to the
DSP. In audio slave mode, the signal is generated by the DSP.
BVDD 21 1 26 Buffer supply input. Voltage range is from 2.7 V to 3.6 V.
CLKOUT 22 2 27 O Clock output. This is a buffered version of the XTI input and is available in 1X or 1/2X frequencies
of XTI. Bit 07 in the sample rate control register controls frequency selection.
CS 12 21 18 I Control port input latch/address select. For SPI control mode this input acts as the data latch
control. For 2-wire control mode this input defines the seventh bit in the device address field.
See Section 3.1 for details.
DIN 24 4 1 I I
2
S format serial data input to the sigma-delta stereo DAC
DGND 20 28 25 Digital supply return
DOUT 27 6 3 O I
2
S format serial data output from the sigma-delta stereo ADC
DVDD 19 27 24 Digital supply input. Voltage range is 1.4 V to 3.6 V.
HPGND 32 11 8 Analog headphone amplifier supply return
HPVDD 29 8 5 Analog headphone amplifier supply input. Voltage level is 3.3 V nominal.
LHPOUT 30 9 6 O Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V
RMS
.
Gain of –73 dB to 6 dB is provided in 1-dB steps.
LLINEIN 11 20 17 I Left stereo-line input channel. Nominal 0-dB input level is 1 V
RMS
. Gain of –34.5 dB to 12 dB is
provided in 1.5-dB steps.
LOUT 2 12 9 O Left stereo mixer-channel line output. Nominal output level is 1.0 V
RMS
.
LRCIN 26 5 2 I/O I
2
S DAC-word clock signal. In audio master mode, the AIC23B generates this framing signal
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.
LRCOUT 28 7 4 I/O I
2
S ADC-word clock signal. In audio master mode, the AIC23B generates this framing signal
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.
MICBIAS 7 17 14 O Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage
level is 3/4 AVDD nominal.
MICIN 8 18 15 I Buffered amplifier input suitable for use with electret-microphone capsules. Without external
resistors a default gain of 5 is provided. See Section 2.3.1.2 for details.
MODE 13 22 19 I Serial-interface-mode input. See Section 3.1 for details.
NC 1, 9
17, 25
Not Used—No internal connection
RHPOUT 31 10 7 O Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 V
RMS
.
Gain of −73 dB to 6 dB is provided in 1-dB steps.
RLINEIN 10 19 16 I Right stereo-line input channel. Nominal 0-dB input level is 1 V
RMS
. Gain of –34.5 dB to 12 dB is
provided in 1.5-dB steps.
ROUT 3 13 10 O Right stereo mixer-channel line output. Nominal output level is 1.0 V
RMS
.