Datasheet

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TLV320AIC20, TLV320AIC21
TLV320AIC24, TLV320AIC25
TLV320AIC20K, TLV320AIC24K
SLAS363D – MARCH 2002 – REVISED APRIL 2005
Control Register 2 Bit Summary (continued)
RESET
BIT NAME FUNCTION
VALUE
D2 GPO 0 General-purpose output
Host port control bits. Write the following values into D1-D0 to select the appropriate configuration for two
pins SDA and SCL. The SDA and SCL pins are used for I
2
C interface if D1-D0 = 00. The SDA and SCL pins
D1-D0 HPC 00
are used for S
2
C interface if D1-D0 = 01. If D1-D0 = 10, the SDA pin = D2, input going into the SCL pin is
output to DOUT (11), the SDA pin = control frame flag.
Control Register 3A
(1)
D7 D6 D5 D4 D3 D2 D1 D0
00 PWDN SWRS ASRF
R/W R/W R/W/S R/W
(1) NOTE: R = Read, W = Write
Control Register 3A Bit Summary
RESET
BIT NAME FUNCTION
VALUE
Power down PWDN = 00
No power down PWDN = 01
D5-D4 PWDN 00 Power-down A/DPWDN = 10
Power-down D/APWDN = 11
Software power down the entire device
D3 SWRS 0 Software reset. Set this bit to 1 to reset the device.
Asynchronous sampling rate factor. These three bits define the ratio n between FS frequency and the
desired sampling frequency fs (Applied only if different sampling rate between CODEC1 and CODEC2 is
desired)
ASRF = 001, n = FS/fs = 1
ASRF = 010, n = FS/fs = 2
D2-D0 ASRF 001 ASRF = 011, n = FS/fs = 3
ASRF = 100, n = FS/fs = 4
ASRF = 101, n = FS/fs = 5
ASRF = 110, n = FS/fs = 6
ASRF = 111, n = FS/fs = 7
ASRF = 000, n = FS/fs = 8
Control Register 3B
(1)
D7 D6 D5 D4 D3 D2 D1 D0
01 8KBF Reserved MHNS MHDS MLDO MSPK
R/W R/W R/W/S
(1) NOTE: R = Read, W = Write
Control Register 3B Bit Summary
RESET
BIT NAME FUNCTION
VALUE
8 kHz band pass filter. Set this bit to 1 to enable the band-bass filter [300 Hz -3.3 kHz] with the sampling
D5 8KBF 0
rate at 8 kHz.
D4 Reserved 0
Mute handset. This bit controls the MUTE function of handset output driver.
D3 MHNS 0 MHNS = 0 Handset output driver is not MUTE.
MHNS = 1 Handset output driver is MUTE.
Mute headset. This bit controls the MUTE function of headset output driver.
D2 MHDS 0 MHDS = 0 Headset output driver is not MUTE.
MHDS = 1 Headset output driver is MUTE.
Mute line output. This bit controls the MUTE function of the 600- Ω output driver.
D1 MLNO 0 MLNO = 0 The 600- Ω output driver is not MUTE.
MLNO = 1 The 600- Ω output driver is MUTE.
Mute 8- Ω speaker. This bit controls the MUTE function of the 8- Ω speaker driver.
D0 MSPK 0 MSPK = 0 The 8- Ω speaker driver is not MUTE.
MSPK = 1 The 8- Ω speaker driver is MUTE.
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