Datasheet

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Control Register 6

TLV320AIC12, TLV320AIC13

TLV320AIC14, TLV320AIC15

TLV320AIC12K, TLV320AIC14K

SLWS115E – OCTOBER 2001 – REVISED JANUARY 2007

D7 D6 D5 D4 D3 D2 D1 D0

PSDO MUTE2 MUTE3 ODRCT AINSEL Reserved

R/W R/W R/W R/W R/W R/W R/W R/W

Control Register 6 Bit Summary

RESET

BIT NAME FUNCTION

VALUE

D7 PSDO 0 Programmable single-ended/differential output. This bit configures the two pins of OUTP2 and OUTP3 as

single-ended or differential output. If the OUTP2 and OUTP3 are single-ended, the OUTMV is the virtual

ground. If the OUTP2 and OUTP3 are differential, the OUTMV is the common inverting output.

PSDO = 0 OUTP2 and OUTP3 are two differential output (1)

PSDO = 1 OUTP2 and OUTP3 are two single-ended output (2)

NOTE:

(1) The OUTP2 and OUTP3 pins are the noninverting output with common inverting output. The OUTMV is

their common inverting output

(2) The virtual ground pin OUTMV and the common mode of OUTP2 and OUTP3 are the same at 1.35 V.

D6 MUTE2 0 Analog Output2 mute control. This bit sets MUTE for OUTP2

MUTE2 = 0 OUTP2 is not MUTE

MUTE2 = 1 OUTP2 is MUTE

D5 MUTE3 0 Analog Output2 mute control. This bit sets MUTE for OUTP3

MUTE3 = 0 OUTP3 is not MUTE

MUTE3 = 1 OUTP3 is MUTE

D4-D3 ODRCT 00 Analog driver control. These two bits enable/disable the analog output drivers for the analog output pins of

OUTP2 and OUTP3

ODRCT =00 OUTP3 = OFF, OUTP2 = OFF

ODRCT =01 OUTP3 = OFF, OUTP2 = ON

ODRCT =10 OUTP3 = ON, OUTP2 = OFF

ODRCT =11 OUTP3 = ON, OUTP2 = ON

D2-D1 AINSEL 00 Analog input select. These bits select the analog input for the ADC

AINSEL = 00 The analog input is INP/M1

AINSEL = 01 The analog input is MICIN self-biased at 1.35 V

AINSEL =10 The analog input is MICIN with external common mode

AINSEL = 11 The analog input is INP/M2

NOTE: For AINSEL = 10, the external common mode is connected to INM1 via an ac-coupled capacitor.

D0 Reserved

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