Datasheet

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Control Register 3
(1)
Control Register 4
(1)
TLV320AIC12, TLV320AIC13
TLV320AIC14, TLV320AIC15
TLV320AIC12K, TLV320AIC14K
SLWS115E – OCTOBER 2001 – REVISED JANUARY 2007
Control Register 2 Bit Summary (continued)
RESET
BIT NAME FUNCTION
VALUE
D2 GPO 0 General-purpose output
D1-D0 HPC 00 Host port control bits.
Write the following values into D1-D0 to select the appropriate configuration for two pins SDA and SCL. The
SDA pin is set to be equal to D2 if D1-D0 = 10.
D1-D0
0 0 SDA and SCL pins are used for I
2
C interface
0 1 SDA and SCL pins are used for S
2
C interface
1 0 SDA pin = D2, input going into SCL pin is output to DOUT
1 1 SDA pin = Control frame flag.
D7 D6 D5 D4 D3 D2 D1 D0
PWDN SWRS OSR-option ASRF
R/W R/W R/W R/W
(1) NOTE: R = Read, W = Write
Control Register 3 Bit Summary
RESET
BIT NAME FUNCTION
VALUE
D7-D6 PWDN 00 Power Down,
PWDN = 00 No power down
PWDN = 01 Power-down A/D
PWDN = 10 Power-down D/A
PWDN = 11 Software power down the entire device
D5 SWRS 0 Software Reset. Set this bit to 1 to reset the device.
D4-D3 OSR 00 OSR option.
option D4 - D3 = X1 OSR for DAC Channel is 512 ( Max Fs = 8 Ksps)
D4 - D3 = 10 OSR for DAC Channel is 256 ( Max Fs = 16 Ksps)
D4 - D3 = 00 OSR for DAC Channel is 128 (Max Fs = 26 Ksps)
D2-D0 ASRF 001 Asynchronous Sampling Rate Factor. These three bits define the ratio n between FS frequency and the
desired sampling frequency Fs (Applied only if different sampling rate between CODEC1 and CODEC2 is
desired)
ASRF = 001 n = FS/Fs = 1
ASRF = 010 n = FS/Fs = 2
ASRF = 011 n = FS/Fs = 3
ASRF = 100 n = FS/Fs = 4
ASRF = 101 n = FS/Fs = 5
ASRF = 110 n = FS/Fs = 6
ASRF = 111 n = FS/Fs = 7
ASRF = 000 n = FS/Fs = 8
D7 D6 D5 D4 D3 D2 D1 D0
FSDIV MNP
R/W R/W R/W R/W R/W R/W R/W R/W
(1) NOTE: R = Read, W = Write
Control Register 4 Bit Summary
RESET
BIT NAME FUNCTION
VALUE
D7 FSDIV 0 Frame sync division factor
FSDIV = 0 To write value of P to bits D2-D0 and value of N to bits D6-D3
FSDIV = 1 To write value of M to bits D6-D0
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