Datasheet

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SCLK
FS
DIN/
DOUT
0 1 2 2n-12n-22n-3
Master Slave
n-2
Slave
1
Slave
2
Slave
n-3
Slave
0
Master Slave
n-2
Slave
n-3
Slave
2
Slave
1
Slave
0
Data Frame Control Frame
(Register R/W)
16 SCLKs Per Slot
Slot
Number
NOTE: n is the total number of AIC12s in the cascade
Continuous Data Transfer Mode
SCLK
FS
DIN
DOUT
16-Bit DAC Data (Sample 1)
16-Bit ADC Data (Sample 1)
Slot Number 0
Slot Number 0
16-Bit DAC Data (Sample 2)
16-Bit ADC Data (Sample 2)
(Sample 3)
(Sample 3)
Data Frame Data Frame
TLV320AIC12, TLV320AIC13
TLV320AIC14, TLV320AIC15
TLV320AIC12K, TLV320AIC14K
SLWS115E – OCTOBER 2001 – REVISED JANUARY 2007
Figure 35. Standard Operation/Programming Mode: Master-Slave Cascade Timing
The continuous data transfer mode, selected by setting bit D6 of the control register 1 to 1, contains conversion
data only. In continuous data transfer mode, the control frame is eliminated and the period of FS signal contains
only the data frame in which the 16-bit data is transferred contiguously, with no inactivity between bits. The
control frame can be reactivated by setting the LSB of DIN data to 1 if the data is in the 15+1 format. To return
the programming mode in the 16-bit DAC data format mode, write 0 in bit D6 of control register 1 using I
2
C or
S
2
C, or do a hardware reset to come out of continuous data transfer mode. If continuous data transfer mode is
used with the turbo mode, the codec should first be set in turbo mode before it is switched from the default
programming mode to the continuous data transfer mode.
Figure 36. Standard Operation/Continuous Data Transfer Mode: Stand-Alone Timing
35
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