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S/Sr I
2
C Device Address (3 Bit)+
Dtdmsp Device Address (+)
R/W
= 0
Mode (5 Bit) + Index Reg
Address
(3 Bit)
Ack Ack Control Reg. Data
(Write)
Ack Control Reg. Data
(Write)
7 Bit 1 Bit 8 Bit 8 Bit 8 Bit
Increment Index Reg. Address
Default/Broadcast
(00000/11111)
Write Mode
To the Address Given
by Index Reg. Address
To the Address Given
by Index Reg. Address
S/Sr I
2
C Device Address (3 Bit)+
Dtdmsp Device Address (+)
R/W
= 1
Control Reg. Data
(Read)
Ack Ack Control Reg. Data
(Read)
Ack
7 Bit 1 Bit 8 Bit 8 Bit
Read Mode
From the Address Given
by Index Reg. Address
From the Address Given
by Index Reg. Address
Increment Index Reg. AddressIncrement Index Reg. Address
S/Sr I
2
C Device Address (3 Bit)+
Dtdmsp Device Address (+)
R/W
= 0
Mode (5 Bit) + Index Reg.
Address
(3 Bit)
Ack Ack
7 Bit 1 Bit 8 Bit
For Initializing Index Reg Address
Stop
Smart Time Division Multiplexed Serial Port (SMARTDM)
TLV320AIC12, TLV320AIC13
TLV320AIC14, TLV320AIC15
TLV320AIC12K, TLV320AIC14K
SLWS115E – OCTOBER 2001 – REVISED JANUARY 2007
Figure 29. Index Register Addresses
The Smart time division multiplexed serial port (SMARTDM) uses the 4 wires of DOUT, DIN, SCLK, and FS to
transfer data into and out of the AIC1x. The TLV320AIC1x's SMARTDM supports three serial interface
configurations (see Table 2 ): stand-alone master, stand-alone slave, and master-slave cascade, employing a
time division multiplexed (TDM) scheme (a cascade of only-slaves is not supported). The SMARTDM allows for
a serial connection of up to 16 codecs to a single serial port. Data communication in the three serial interface
configurations can be carried out in either standard operation (Default) or turbo operation. Each operation has
two modes; programming mode (default mode) and continuous data transfer mode. To switch from the
programming mode to the continuous data transfer mode, set bit D6 of control register 1 to 1, which is reset
automatically after switching back to programming mode. The TLV320AIC1x can be switched back from the
continuous data transfer mode to the programming mode by setting the LSB of the data on DIN to 1, only if the
data format is (15+1), as selected by bit 0 of control register 1. The SMARTDM automatically adjusts the number
of time slots per frame sync (FS) to match the number of codecs in the serial interface so that no time slot is
wasted. Both the programming mode and the continuous data transfer mode of the TLV320AIC1x are
compatible with the TLV320AIC10. The TLV320AIC1x provides primary/secondary communication and
continuous data transfer with improvements and eliminates the requirements for hardware and software requests
for secondary communication as seen in other devices. The TLV320AIC1x continuous data transfer mode now
supports both master/slave stand alone and cascade.
Table 2. Serial Interface Configurations
M/S PIN FSD PIN
TLV320AIC1x CONNECTIONS COMMENTS
MASTER SLAVE MASTER SLAVE
Stand-alone master High NA Pull high NA
Stand-alone slave NA Low NA Pull-low
Connect to the next slave's FS
Master-slave cascade High Low Last slave's FSD pin is pulled high
(see Figure 32 )
Slave-slave cascade NA NA NA NA Not supported
30
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