Datasheet

3–4
To program control register 1, the following procedure must be performed through DIN:
• Request secondary communication by setting either D0=1(software request), or FC = high (hardware
request) during the primary communication interval.
• At the secondary communication interval (FS), send data in the following format through DIN:
Device Address RW Register Address X Register Content
0 1 1 0 0 0 1 x d d d d d d d d
DS15 DS0
• The following is the data out of DOUT.
Device Address RW Register Address X Register Content
0 1 1 0 x x x x 0 0 0 0 0 0 0 0
DS15 DS0
Figure 3–4 is the timing diagram of this procedure.
DOUT
PS
DIN
Register Write
FS
(Device Addr) + All 0
Figure 3–4. Device 3/Register 1 Write Operation Timing Diagram
3.2.2 Hardware Secondary Serial Communication Request
A secondary communication can be requested by asserting an FC pulse that sets an internal flag. This flag is reset
as soon as the programming of control registers is finished. Thus, one FC pulse needs to be asserted per secondary
communication request. Figures 3–5 and 3–6 show the FS output from a master device.
DIN
FS
Primary Secondary Primary
FC
Secondary
Request
No Secondary
Request
DAC Data In
Register
Read/Write
DAC Data In
DOUT
ADC Data Out
Register
Read/Write
ADC Data Out
Figure 3–5. FS Output When Hardware Secondary Serial Communication
Is Requested Only Once (No Slave)