Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsTLV320AIC10IPFB

2–8

The TLV320AIC10 has four serial-interface modes that support most modern DSP engines. This modes can be

selected by M0 and M1. In mode 0 (Figure 2–8), FS is one-bit wide and it is active high one SCLK period before the

first bit (MSB) of each data transmission. In modes 1 (Figure 2–9) and 2 (Figure 2–10), the TLV320AIC10 operates

as a slave to interface with an SPI master in which FS is the SPISEL that determines the sampling rate. SCLK needs

to be free-running. In mode 3 (Figure 2–11), FS is low during data transmission into DIN and DOUT.

Table 2–1. Serial Interface Modes

MODE M1 M0 FRAME SYNC (FS) FORMAT

0 0 0 Pulse mode

1 0 1 SPI_CP0 mode (SPI mode 0)

2 1 0 SPI_CP1 mode (SPI mode 1)

3 1 1 Frame mode

16 SCLKs

SCLK

DIN/DOUT

(16-bit)

MSB LSB

D15

0 1 15 16

D14

……

Figure 2–8. Timing Diagram for the FS Pulse Mode (M1M0 = 00)

16 SCLKs

(SCLK)

(FS)

DIN/DOUT

(16-bit)

MSB LSB

D15

01 15

D14

……

SPICLK

SPISEL

Figure 2–9. Timing Diagram for the SPI_CP0 Mode (M1M0 = 01)

16 SCLKs

(SCLK)

(FS)

DIN/DOUT

(16-bit)

MSB LSB

D15

01 15

D14

……

SPICLK

SPISEL

Figure 2–10. Timing Diagram for the SPI_CP1 Mode (M1M0 = 10)