Datasheet

TLV320ADC3101
www.ti.com
...................................................................................................................................... SLAS553A NOVEMBER 2008 REVISED SEPTEMBER 2009
Page Instructions
41 288 to 319
42 320 to 351
43 352 to 383
44 384 to 415
45 416 to 447
46 448 to 479
47 480 to 511
Revision History
Changes from Original (November 2008) to Revision A ................................................................................................ Page
Changed Revised block diagram ........................................................................................................................................... 2
Revised column heading for Pin Functions table .................................................................................................................. 3
Revised column heading for Pin Functions table .................................................................................................................. 4
Added voltage value for AVDD in Electrical Characteristics condition statement ................................................................. 5
Added " Input common-mode voltage " to ADC Electrical Characteristics Table. ................................................................... 5
Added voltage value for AVDD in Electrical Characteristics condition statement ................................................................. 6
Added a row to the Microphone Bias section of the Electrical Characteristics table ............................................................. 6
Changed Figure 5 - DSP Timing in Slave Mode. Added the WCLK text note..................................................................... 10
Changed Figure 7 - Single-Ended Dynamic Range Plot to Input-Referred Noise vs PGA Gain......................................... 11
Added miniDSP Section and miniDSP Information Throughout Datasheet ........................................................................ 14
Added Figure 43 - 2s Complement Coefficient Format ....................................................................................................... 37
Changed Data Format for All Control Register Definitions From Decimal To Hex (Binary) ............................................... 43
Removed note following the page 0 / register 94 description table ..................................................................................... 61
Changed bit values from 1 and 2 to 0 and 1, respectively. ................................................................................................. 61
Listed values 81 through 127 as reserved ........................................................................................................................... 61
Replaced the listing of page 4 registers .............................................................................................................................. 68
Added a listing for page 5 registers ..................................................................................................................................... 72
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