Datasheet

CONTROL REGISTERS Page 1: ADC Routing, PGA, Power-Controls, Etc.
TLV320ADC3101
www.ti.com ...................................................................................................................................... SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009
Page 0 / Register 101: Right AGC Gain Applied
BIT
(1)
READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R 0000 0000 Right AGC Gain Value Status:
1110 1000: Gain applied by right AGC = – 12 dB
1110 1001: Gain applied by right AGC = – 11.5 dB
...
1111 1111: Gain applied by right AGC = – 0.5 dB
0000 0000: Gain applied by right AGC = 0 dB
0000 0001: Gain applied by right AGC = 0.5 dB
...
0100 1111: Gain applied by right AGC = 39.5 dB
0101 0000: Gain applied by right AGC = 40 dB
0101 0001 – 1111 1111: Reserved. Do not use.
(1) These are read-only bits.
Page 0 / Register 102 Through Page 0 / Register 127: Reserved
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R XXXX XXXX Reserved. Do not write to these registers.
Page 1 / Register 0: Page Control Register
(1)
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0000 0000 0000 0000: Page 0 selected
0000 0001: Page 1 selected
...
1111 1110: Page 254 selected (reserved)
1111 1111: Page 255 selected (reserved)
(1) Valid pages are 0, 1, 4, 5, 32-47. All other pages are reserved (do not access).
Page 1 / Register 1 Through Page 1 / Register 25: Reserved
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R XXXX XXXX Reserved. Do not write to these registers.
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