Datasheet
TLV320ADC3101
www.ti.com
...................................................................................................................................... SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009
Page 0 / Register 22: ADC miniDSP Engine Decimation
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D4 R 0000 Reserved. Do not write any value other than reset value.
D3 – D0 R/W 0100 0000: Decimation ratio in ADC miniDSP engine = 16
0001: Decimation ratio in ADC miniDSP engine = 1
0010: Decimation ratio in ADC miniDSP engine = 2
...
1101: Decimation ratio in ADC miniDSP engine = 13
1110: Decimation ratio in ADC miniDSP engine = 14
1111: Decimation ratio in ADC miniDSP engine = 15
Page 0 / Register 23 Through Page 0 / Register 24: Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R XXXX XXXX Reserved. Do not write to these registers.
Page 0 / Register 25: CLKOUT MUX
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D3 R 0000 0 Reserved. Do not write any value other than reset value.
D2-D0 R/W 000 000: CDIV_CLKIN = MCLK (device pin)
001: CDIV_CLKIN = BCLK (device pin)
010: Reserved. Do not use.
011: CDIV_CLKIN = PLL_CLK (generated on-chip)
100: Reserved. Do not use.
101: Reserved. Do not use.
110: CDIV_CLKIN = ADC_CLK (generated on-chip)
111: CDIV_CLKIN = ADC_MOD_CLK (generated on-chip)
Page 0 / Register 26: CLKOUT M Divider
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: CLKOUT M divider is powered down.
1: CLKOUT M divider is powered up.
D6 – D0 R/W 000 0001 000 0000: CLKOUT divider M = 128
000 0001: CLKOUT divider M = 1
000 0010: CLKOUT divider M = 2
...
111 1110: CLKOUT divider M = 126
111 1111: CLKOUT divider M = 127
Page 0 / Register 27: ADC Audio Interface Control 1
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D6 R/W 00 00: ADC interface = I
2
S
01: ADC interface = DSP
10: ADC interface = RJF
11: ADC interface = LJF
D5 – D4 R/W 00 00: ADC interface word length = 16 bits
01: ADC interface word length = 20 bits
10: ADC interface word length = 24 bits
11: ADC interface word length = 32 bits
D3 R/W 0 0: BCLK is input.
1: BCLK is output.
D2 R/W 0 0: WCLK is input.
1: WCLK is output.
D1 R 0 Reserved. Do not write any value other than reset value.
D0 R/W 0 0: 3-stating of DOUT: disabled
1: 3-stating of DOUT: enabled
Copyright © 2008 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 49
Product Folder Link(s) :TLV320ADC3101