Datasheet

SIMPLIFIED BLOCK DIAGRAM
DMDIN/GPIO1
DMCLK/GPIO2
DINL
DINR
I2C
_ADR1
I2C_ADR0
ADC
AGC
DVDD
DVSS
IOVDD
AVDD
AVSS
MCLK
SCL
SDA
RESET
ADC
AGC
MICBIAS2
MICBIAS1
PGA
0to40 dB
0.5-dB
Steps
PGA
0to40 dB
0.5-dB
Steps
miniDSP
Processing
Blocks
DOUT
BCLK
WCLK
I
S
2
TDM
Serial
Bu
s
Interface
I C
2
Serial
ControlBus
CurrentBias/
Reference
Mic
Bias2
Mic
Bias1
AudioClock
Generation
PLL
Analog
SignalInput
Swit
ching
and
Attenuation
IN
1L(P)
IN1R(M)
IN3L(M)
I
N3R(M)
IN2L(P)
IN2R(P)
Digital
Microphone
Interfa
ce
TLV320ADC3101
TLV320ADC3101
SLAS553A NOVEMBER 2008 REVISED SEPTEMBER 2009 ......................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Figure 1. TLV320ADC3101 Block Diagram
2 Submit Documentation Feedback Copyright © 2008 2009, Texas Instruments Incorporated
Product Folder Link(s) :TLV320ADC3101