Datasheet

TLV320ADC3001
SLAS548C –OCTOBER 2008– REVISED APRIL 2011 www.ti.com
Page 0 / Register 58: ADC Sync Control 2
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 0000 0000: Custom synchronization target = instruction 0
0000 0001: Custom synchronization target = instruction 2
0000 0010: Custom synchronization target = instruction 4
...
1111 1111: Custom synchronization target = instruction 510
Page 0 / Register 59: ADC CIC Filter Gain Control
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D4 R/W 0100 Left CIC filter gain
(1)
D3–D0 R/W 0100 Right CIC filter gain
(1)
(1) For proper operation, CIC gain must be ≤ 1.
If AOSR {page 0 / register 20} = 64 and (1 ≤ filter mode {page 0 / register 61} ≤ 6), then the reset value of 4 results in CIC gain = 1.
Otherwise, the CIC gain = (AOSR/(64 × miniDSP engine decimation))
4
× 2
(CIC filter gain control)
for 0 ≤ CIC filter gain control ≤ 12,
and if CIC filter gain control = 15, CIC gain is automatically set such that for 7 ≤ (AOSR/miniDSP engine decimation) ≤ 64,
0.5 < CIC gain ≤ 1.
Page 0 / Register 60: Reserved
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 Reserved. Do not write to this register.
Page 0 / Register 61: ADC Processing Block / miniDSP Selection
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D5 000 Reserved. Do not write any value other than reset value.
D4–D0 0 0001 0 0000: ADC miniDSP programmable instruction mode enabled.
0 0001: Select ADC signal-processing block PRB_R1
0 0010: Select ADC signal-processing block PRB_R2
0 0011: Select ADC signal-processing block PRB_R3
0 0100: Select ADC signal-processing block PRB_R4
0 0101: Select ADC signal-processing block PRB_R5
0 0110: Select ADC signal-processing block PRB_R6
0 0111: Select ADC signal-processing block PRB_R7
0 1000: Select ADC signal-processing block PRB_R8
0 1001: Select ADC signal-processing block PRB_R9
0 1010: Select ADC signal-processing block PRB_R10
0 1011: Select ADC signal-processing block PRB_R11
0 1100: Select ADC signal-processing block PRB_R12
0 1101: Select ADC signal-processing block PRB_R13
0 1110: Select ADC signal-processing block PRB_R14
0 1111: Select ADC signal-processing block PRB_R15
1 0000: Select ADC signal-processing block PRB_R16
1 0001: Select ADC signal-processing block PRB_R17
1 0010: Select ADC signal-processing block PRB_R18
1 0011–1 1111: Reserved. Do not use.
Page 0 / Register 62: Programmable Instruction-Mode Control Bits
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R 0 Reserved. Do not write any value other than reset value.
D6 R/W 0 ADC miniDSP engine auxiliary control bit A, which can be used for conditional instructions like JMP
D5 R/W 0 ADC miniDSP engine auxiliary control bit B, which can be used for conditional instructions like JMP
D4 R/W 0 0: ADC instruction-counter reset at the start of the new frame is enabled.
1: ADC instruction-counter reset at the start of the new frame is disabled.
D3–D0 R 0000 Reserved. Do not write any value other than reset value.
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