Datasheet

TLV320ADC3001

www.ti.com

SLAS548C –OCTOBER 2008– REVISED APRIL 2011

# Right Analog PGA Seeting = 0dB

w 30 3c 00

# (d) Routing of inputs/common mode to ADC input

# (e) Unmute analog PGAs and set analog gain

# Left ADC Input selection for Left PGA = IN1L(P) as Single-Ended

w 30 34 fc

# Right ADC Input selection for Right PGA = IN1R(M) as Single-Ended

w 30 37 fc

# 4. Program ADC

# (a) Set register Page to 0

w 30 00 00

# (b) Power up ADC channel

# Power-up Left ADC and Right ADC

w 30 51 c2

# (c) Unmute digital volume control and set gain = 0 dB

# UNMUTE

w 30 52 00

CONTROL REGISTERS

The control registers for the TLV320ADC3001 are described in detail as follows. All registers are 8 bits in width,

with D7 referring to the most-significant bit of each register, and D0 referring to the least-significant bit.

Pages 0, 1, 4, 5, and 32–47 are available. All other pages are reserved. Do not read from or write to reserved

pages.