Datasheet
ADCChannelResponseforDecimationFilterC
(Redlinecorrespondsto –60dB)
0
–20
–40
–60
–100
–80
–120
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
FrequencyNormalizedtof
S
Magnitude – dB
G015
TLV320ADC3001
SLAS548C –OCTOBER 2008– REVISED APRIL 2011
www.ti.com
Decimation Filter C
Filter type C along with AOSR of 32 is specially designed for 192ksps operation for the ADC. The pass band
which extends up to 0.11 × f
S
(corresponds to 21 kHz), is suited for audio applications.
Table 12. ADC Decimation Filter C, Specifications
Parameter Condition Value (Typical) Units
Filter gain from 0 to 0.11 f
S
0…0.11 f
S
±0.033 dB
Filter gain from 0.28 f
S
to 16 f
S
0.28 f
S
…16 f
S
–60 dB
Filter group delay 11/ f
S
s
Pass-band ripple, 8 ksps 0…0.11 f
S
0.033 dB
Pass-band ripple, 44.18 ksps 0…0.11 f
S
0.033 dB
Pass-band ripple, 48 ksps 0…0.11 f
S
0.032 dB
Pass-band ripple, 96 ksps 0…0.11 f
S
0.032 dB
Pass-band ripple, 192 ksps 0…20 kHz 0.086 dB
Figure 45. ADC Decimation Filter C, Frequency Response
ADC Setup
The following paragraphs are intended to guide a user through the steps necessary to configure the
TLV320ADC3001.
Step 1
The system clock source (master clock) and the targeted ADC sampling frequency must be identified.
Depending on the targeted performance, the decimation filter type (A, B, or C) and AOSR value can be
determined:
• Filter A should be used for 48-kHz high-performance operation; AOSR must be a multiple of 8.
• Filter B should be used for up to 96-kHz operations; AOSR must be a multiple of 4.
• Filter C should be used for up to 192-kHz operations; AOSR must be a multiple of 2.
In all cases, AOSR is limited in its range by the following condition:
2.8 MHz < AOSR × ADC_f
S
< 6.2 MHz
Based on the identified filter type and the required signal-processing capabilities, the appropriate processing
block can be determined from the list of available processing blocks (PRB_R4 to PRB_R18).
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