Datasheet

To Audio
Interface
1
st
Order
IIR
x
AGC
Gain
Compen
Sation
AGC
To AnalogPGA
Filter A
FromDelta-Sigma
Modulatoror
DigitalMicrophone
From
DigitalVol.Ctrl
TLV320ADC3001
SLAS548C –OCTOBER 2008– REVISED APRIL 2011 www.ti.com
The signal processing blocks available are:
• First-order IIR
• Scalable number of biquad filters
• Variable-tap FIR filter
• AGC
The processing blocks are tuned for common cases and can achieve high anti-alias filtering or low group delay in
combination with various signal processing effects such as audio effects and frequency shaping. The available
first order IIR, biquad, and FIR filters have fully user-programmable coefficients. ADC processing blocks can be
selected by writing to page 0 / register 61. The default (reset) processing block is PRB_R1.
Table 6. ADC Processing Blocks
Decimation 1st Order Number
Processing Required AOSR
Channel FIR Resource Class
Blocks Value
Filter IIR Available BiQuads
PRB_R1 Stereo A Yes 0 No 128, 64 6
PRB_R2 Stereo A Yes 5 No 128, 64 8
PRB_R3 Stereo A Yes 0 25-tap 128, 64 8
PRB_R4 Right A Yes 0 No 128, 64 3
PRB_R5 Right A Yes 5 No 128, 64 4
PRB_R6 Right A Yes 0 25-tap 128, 64 4
PRB_R7 Stereo B Yes 0 No 64 3
PRB_R8 Stereo B Yes 3 No 64 4
PRB_R9 Stereo B Yes 0 20-tap 64 4
PRB_R10 Right B Yes 0 No 64 2
PRB_R11 Right B Yes 3 No 64 2
PRB_R12 Right B Yes 0 20-tap 64 2
PRB_R13 Right C Yes 0 No 32 3
PRB_R14 Stereo C Yes 5 No 32 4
PRB_R15 Stereo C Yes 0 25-tap 32 4
PRB_R16 Right C Yes 0 No 32 2
PRB_R17 Right C Yes 5 No 32 2
PRB_R18 Right C Yes 0 25-tap 32 2
Processing Blocks – Details
First-Order IIR, AGC, Filter A
Figure 34. Signal Chain for PRB_R1 and PRB_R4
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