Datasheet

 
  
    
SLOS197A − AUGUST1997 − REVISED MARCH 2001
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2721Y chip information
This chip, when properly assembled, displays characteristics similar to the TLV2721C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 10 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T
J
max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (2) IS INTERNALLY CONNECTED
TO
BACKSIDE
OF
CHIP.
+
OUT
IN+
IN
V
DD+
(2)
(3)
(4)
(1)
(5)
V
DD
/GND
46
(3)
(2)
(1)
(5)
(4)
31