Datasheet
TLV2556
SLAS355A – DECEMBER 2001 – REVISED SEPTEMBER 2002
31
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PRINCIPLES OF OPERATION
C1
0.1 µF
Decoupling Cap
C2
10 µF
Int Reference
Compensation Cap
GND
Analog
Supply
Sample
∼50 pF
CDAC
Convert
REF+
REF–
Internal
Reference
V
CC
S1, S2:
Closed = Internal Reference Used
Opened = External Reference Used
C2 and Grounding REF– Are Required
When Either 4.096 V or 2.048 Internal
Reference Is Used
S1 S2
Figure 54. Reference Block
INT/EOC output
Pin 19 outputs the status of the ADC conversion. When programmed as EOC, the output indicates the beginning
and the end of conversion. In the reset state, EOC is always high. During the sampling period (beginning after
the fourth falling edge of the I/O CLOCK sequence), EOC remains high until the internal sampling switch of the
converter is safely opened. The opening of the sampling switch occurs after the eighth, twelfth, or sixteenth I/O
CLOCK falling edge, depending on the data-length selection in the input data register. After the EOC signal goes
low, the analog input signal can be changed without affecting the conversion result.
The EOC signal goes high again after the conversion is completed and the conversion result is latched into the
output data register. The rising edge of EOC returns the converter to a reset state and a new I/O cycle begins.
On the rising edge of EOC, the first bit of the current conversion result is on DATA OUT when CS
is low. When
CS
is toggled between conversions, the first bit of the current conversion result occurs on DATA OUT at the
falling edge of CS
.
When programmed as INT
, the output indicates that the conversion is completed and the output data is ready
to be read. In the reset state, INT
is always high. INT is high during the sampling period and until the conversion
is complete. After the conversion is finished and the output data is latched, INT
goes low and remains low until
it is cleared by the host. When CS
is held low, the MSB (or LSB) of the conversion result is presented on DATA
OUT on the falling edge of INT
. A rising I/O CLOCK edge clears the interrupt.