Datasheet

TLV2553
SLAS354B – SEPTEMBER 2001 – REVISED SEPTEMBER 2002
7
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timing characteristics over recommended operating free-air temperature range, V
REF+
= 5 V,
I/O CLOCK frequency = 15 MHz, V
CC
= 5 V, load = 25 pF (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
t
w1
Pulse duration I/O CLOCK high or low 26.7 100000 ns
t
su1
Setup time DATA IN valid before I/O CLOCK rising edge (see Figure 26) 12 ns
t
h1
Hold time DATA IN valid after I/O CLOCK rising edge (see Figure 26) 0 ns
t
su2
Setup time CS low before first rising I/O CLOCK edge
(see Note 7 and Figure 27)
25 ns
t
h2
Hold time CS pulse duration high time (see Figure 27) 100 ns
t
h3
Hold time CS low after last I/O CLOCK falling edge (see Figure 27) 0 ns
t
h4
Hold time DATA OUT valid after I/O CLOCK falling edge (see Figure 28) 2 ns
t
h5
Hold time CS high after EOC rising edge when CS is toggled (see Figure 31) 0 ns
t
d1
Delay time CS fallin
g
ed
g
e to DATA OUT valid
Load = 25 pF 28 ns
t
d1
ygg
(MSB or LSB) (see Figure 25)
Load = 10 pF
20 ns
t
d2
Delay time CS rising edge to DATA OUT high impedance (see Figure 25) 10 ns
t
d3
Delay time I/O CLOCK falling edge to next DATA OUT bit valid (see Figure 28) 2 20
ns
t
d4
Delay time Last I/O CLOCK falling edge to EOC falling edge 55 ns
t
d5
Delay time last I/O CLOCK falling edge to CS falling edge to abort conversion 1.5 µs
t
t1
Transition time I/O CLOCK (see Note 7 and Figure 28) 1 µs
t
t2
Transition time DATA OUT (see Figure 28) 5 ns
t
t3
Transition time INT/EOC, C
L
at 7 pF (see Figure 30) 2.4 ns
t
t4
Transition time DATA IN, CS 10 µs
t
cycle
Total cycle time (sample, conversion and delays) (see Note 7)
MAX(t
convert
) +
I/O period
(8/12/16 CLKs)
µs
Source impedance = 25 Ω 600
t
l
Channel acquisition time (sample), at 1 kΩ
Source impedance = 100 Ω
650
ns
t
sample
q(),
See Figures 33–38 and Note 7
Source impedance = 500 Ω
700
ns
Source impedance = 1 kΩ 1000
NOTE 7: I/O CLOCK period = 8X [1/(I/O CLOCK frequency)] or 12X [1/(I/O CLOCK frequency)] or 16X [1/(I/O CLOCK frequency)] depends on
I/O format selected.