Datasheet

TLV2332, TLV2332Y, TLV2334, TLV2334Y
LinCMOS LOW-VOLTAGE MEDIUM-POWER
OPERATIONAL AMPLIFIERS
SLOS189 – FEBRUARY 1997
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
These amplifiers offer a level of ac performance greater than that of many other devices operating at
comparable power levels. The TLV233x operational amplifiers are especially well suited for use in low-current
or battery-powered applications.
Low-voltage and low-power operation has been made possible by using the Texas Instruments silicon-gate
LinCMOS technology. The LinCMOS process also features extremely high input impedance and ultra-low bias
currents making these amplifiers ideal for interfacing to high-impedance sources such as sensor circuits or filter
applications.
To facilitate the design of small portable equipment, the TLV233x is made available in a wide range of package
options, including the small-outline and thin-shrink small-outline package (TSSOP). The TSSOP package has
significantly reduced dimensions compared to a standard surface-mount package. Its maximum height of only
1.1 mm makes it particularly attractive when space is critical.
The device inputs and outputs are designed to withstand –100-mA currents without sustaining latch-up. The
TLV233x incorporates internal ESD-protection circuits that prevents functional failures at voltages up to
2000 V as tested under MIL-STD 883C, Method 3015.2; however, care should be exercised in handling these
devices as exposure to ESD may result in the degradation of the device parametric performance.
TLV2332Y chip information
This chip, when properly assembled, display characteristics similar to the TLV2332. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T
J
max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
–
1OUT
1IN+
1IN–
V
DD
V
DD–
/GND
(8)
(6)
(3)
(2)
(5)
(1)
–
+
(7)
2IN+
2IN–
2OUT
(4)
59
72
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)