Datasheet

TLV2231, TLV2231Y
Advanced LinCMOS RAIL-TO-RAIL
LOW-POWER SINGLE OPERATIONAL AMPLIFIERS
SLOS158D – JUNE 1996 – REVISED APRIL 2001
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
T
A
V
IO
max AT 25°C
PACKAGED DEVICES
SYMBOL
CHIP
FORM
‡
T
A
V
IO
max
AT
25°C
SOT-23 (DBV)
†
SYMBOL
FORM
‡
(Y)
0°C to 70°C 3 mV TLV2231CDBV VAEC
TLV2231Y
–40°C to 85°C 3 mV TLV2231IDBV VAEI
TLV2231Y
†
The DBV package available in tape and reel only.
‡
Chip forms are tested at T
A
= 25°C only.
TLV2231Y chip information
This chip, when properly assembled, displays characteristics similar to the TLV2231C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 10 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T
J
max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (2) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
–
OUT
IN+
IN–
V
DD+
(5)
(1)
(3)
(4)
(2)
V
DD–
/GND
40
(3)
(2)
(1)
(5)
(4)
32