Datasheet

TLV1572
2.7 V TO 5.5 V, 10-BIT, 1.25 MSPS
SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTO-POWERDOWN
SLAS171A – DECEMBER 1997– REVISED SEPTEMBER 1998
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t
c
1
2
3
t
h1
t
su1
t
su2
t
h2
t
d1
0
t
d(L)1
SCLK
CS
FS
DO
Figure 1. DSP Mode Timing Diagram
1
2
3
00
SCLK
CS
FS
DO
4
0
t
d(L)2
t
d2
Figure 2. µC Mode Timing Diagram