Datasheet

TLV1544C, TLV1544I, TLV1548C, TLV1548I, TLV1548M
LOW-VOLTAGE 10-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 4/8 ANALOG INPUTS
SLAS139C – DECEMBER 1996 – REVISED JANUARY 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics over recommended operating free-air temperature range,
V
CC
= V
ref+
= 2.7 V to 5.5 V, I/O CLK frequency = 2.2 MHz (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
t
d(I/O-DATA)
Delay time, I/O CLK low to DATA OUT valid See Figure 11 50 ns
t
d(I/O-EOC)
Delay time, 10th I/O CLK↓ to EOC low See Figure 12 70 240 ns
t
PZH
, t
PZL
Enable time, CS low to DATA OUT valid (MSB driven) See Figure 8 0.7 1.3 µs
t
PHZ
, t
PLZ
Disable time, CS high to DATA OUT invalid (high impedance) See Figure 8 70 150 ns
t
f(EOC)
Fall time, EOC See Figure 12 15 50 ns
t
r(bus)
Rise time, output data bus at 2.2 MHz I/O CLK See Figure 11 50 250 ns
t
f(bus)
Fall time, output data bus at 2.2 MHz I/O CLK See Figure 11 50 250 ns
†
All typical values are at T
A
= 25°C.
PARAMETER MEASUREMENT INFORMATION
_
+
C2
0.1 µF
C1
10 µF
15 V
–15 V
V
I
Ax
TLV1544/48
U1
C1
10 µF
C2
0.1 µF
LOCATION
U1
C1
C2
DESCRIPTION
OP27
10-µF 35-V tantalum capacitor
0.1-µF ceramic NPO SMD capacitor
PART NUMBER
—
—
AVX 12105C104KA105 or equivalent
EOC
D0
Figure 6. Analog Input Buffer to Analog Inputs
EOC
C
L
= 50 pF
12 kΩ
DATA OUT
Test Point
V
CC
R
L
= 2.18 kΩ
C
L
= 100 pF
12 kΩ
Test Point
V
CC
R
L
= 2.18 kΩ
Figure 7. Load Circuits