Datasheet

TLK2711A
www.ti.com SLLS908B –JULY 2008–REVISED OCTOBER 2012
TERMINAL FUNCTIONS
TERMINAL
NO. I/O DESCRIPTION
NAME
GQE RCP
ENABLE A5 24 I
(1)
Device enable. When this terminal is held low, the device is placed in power-down mode.
Only the signal detect circuit on the serial receive pair is active. When asserted high while the
device is in power-down mode, the transceiver goes into power-on reset before beginning
normal operation.
GND A1, J1, D3, 5, 13, 18, Digital logic ground. Provides a ground for the logic circuits and digital I/O buffers.
E3, F3, G3, 28, 33,
C4, D4, E4, 43
F4, G4, A9,
J9
GNDA H4, H6 52, 58, Analog ground. GNDA provides a ground reference for the high-speed analog circuits, RX
61 and TX.
LCKREFN B5 25 I
(1)
Lock to reference. When LCKREFN is low, the receiver clock is frequency locked to TXCLK.
This places the device in a transmit only mode since the receiver is not tracking the data.
When LCKREFN is asserted low, the receive data bus terminals, RXD[0:15], RXCLK and
RKLSB, RKMSB are in a high-impedance state.
When LCKREFN is deasserted high, the receiver is locked to the received data stream.
LOOPEN B6 21 I
(2)
Loop enable. When LOOPEN is active high, the internal loop-back path is activated. The
transmitted serial data is directly routed internally to the inputs of the receiver. This provides a
self-test capability in conjunction with the protocol device. The TXP and TXN outputs are held
in a high-impedance state during the loop-back test. LOOPEN is held low during standard
operational state with external serial outputs and inputs active.
PRE J5 56 I
(2)
Preemphasis control. Selects the amount of preemphasis to be added to the high speed serial
output drivers. Left low or unconnected, 5% preemphasis is added. Pulled high, 20%
preemphasis is added.
PRBSEN A4 26 I
(2)
PRBS test enable. When asserted high results of pseudo random bit stream (PRBS) tests can
be monitored on the RKLSB terminal. A high on RKLSB indicates that valid PRBS is being
received.
RKLSB A3 29 O K-Code indicator/PRBS test results. When RKLSB is asserted high, an 8-bit/10-bit K code
was received and is indicated by data bits RXD0–RXD7. When RKLSB is asserted low an 8-
bit/10-bit D code is received and is presented on data bits RXD0–RXD7.
When PRBSEN is asserted high this pin is used to indicate status of the PRBS test results
(high = pass).
RKMSB B3 30 O K-code indicator. When RKMSB is asserted high an 8-bit/10-bit K code was received and is
indicated by data bits RXD8–RXD15. When RKMSB is asserted low an 8-bit/10-bit D code
was received and is presented on data bits RXD8–RXD15. If the differential signal on RXN
and RXP drops below 200 mV, then RXD [0:15], RKLSB, and RKMSB are all asserted high.
RXCLK E2 Recovered clock. Output clock that is synchronized to RXD [0..9], RKLSB, and RKMSB.
O RXCLK is the recovered serial data rate clock divided by 20. RXCLK is held low during
RX_CLK 41
power-on reset.
(1) Internal 10k pullup
(2) Internal 10k pulldown
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