Datasheet
SLLS591C− OCTOBER 2003 − REVISED JULY 2007
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°C
POWER RATING
DERATING FACTOR
†
ABOVE T
A
= 25°C
T
A
= 70°C
POWER RATING
PAP64
‡
3.22 W 32.15 mW/°C 1.77 W
PAP64
§
0.94 W 9.46 mW/°C 0.52 W
PAP64
¶
0.68 W 6.78 mW/°C 0.37 W
†
This is the inverse of the traditional junction-to-ambient thermal resistance (R
θJA
)
‡
High K-board with solder
§
High K-board without solder
¶
Low K-board
NOTE: For more information, see the TI application note PowerPAD Thermally Enhanced Package, TI (SLMA002).
electrical characteristics over recommended operating conditions
PARAMETER TEST CONDITION MIN TYP MAX UNIT
V
DD
Supply voltage 2.3 2.5 2.7 V
T
A
Operating free-air temperature −40 85 °C
I
CC
Supply current
V
DD
= 2.5 V, Freq = 500 Mb/sec, PRBS pattern 45
mA
I
CC
Supply current
V
DD
= 2.5 V, Freq = 1.3 Gb/sec, PRBS pattern
115
mA
V
DD
= 2.5 V, Freq = 500 Mb/sec, PRBS pattern 113
P
D
Power dissipation
V
DD
= 2.5 V, Freq = 1.3 Gb/sec, PRBS pattern
288
mW
P
D
Power dissipation
V
DD
= 2.7 V, Freq = 1.3 Gb/sec, worst case pattern 475
mW
Shutdown current ENABLE = 0, VDDA, VDD pins, V
DD
= max 130 µA
PLL start-up lock time V
DD
, VDDA = 2.3 V, EN ↑ to PLL acquire 0.1 0.4 ms
Data acquisition time 1024 bits
reference clock (GTX_CLK) timing requirements over recommended operating conditions (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R
Frequency
Minimum data rate TYP−0.01% 25 TYP+0.01% MHz
R
ω
Frequency
Maximum data rate
TYP−0.01% 65 TYP+0.01% MHz
Frequency tolerance −100 100 ppm
Duty cycle 40% 50% 60%
Jitter
#
Peak-to-peak 40 ps
#
See the Reference Lock Jitter Analysis For TLK1521 application note for more information.