Datasheet

www.ti.com
JMP7
PRBSEN
SYNCEN
ENABLE
RBCMODE
LOOPEN
GND
TLK1221
89
GND
RD[9:0]
TD[9:0]
GND
TD[9:0]
VDD
237 6 5 4
89 237 6 5 4
JMP6
01
01
REFCLK
R
X
N
RXPTXP
TXN
JMP8
RBC0
RBC1
SYNC
GND
JMP9
VDDPLL
VDD
JMP10
VDDA
VDD
VDD
GND
GND
VDDPLL
VDDA
POWER
SUPPLY
2.5V
+ -
CLOCK
OUT
PULSE
GENERATOR
DIGITAL OSCILLOSCOPE
CH1 CH2 CH3 CH4
Typical Test and Setup Configurations
Figure 6. TLK1221 EVM Serial PRBS 2^7-1 Self-Test Configuration
If a serial BERT is available, the system designer can independently test both serial channels of the
device with a PRBS 2^7-1 data pattern, see Figure 7 . If the designer asserts the PRBSEN pin high, a
Pseudo Random Bit Pattern will be transmitted. This pin also puts the receiver in a mode to detect a valid
PRBS pattern. A valid pattern is indicated by the SYNC pin indicating high. This test only validates the
high-speed serial portion of the device and the system interconnects. The PRBS pattern is compatible with
most serial BERT test equipment. This function allows the operator to isolate and test the transmitter and
receiver independently. A typical configuration is shown in Figure 7 . The dashed lines represent optional
connections that can be made for monitoring eye patterns and measuring jitter.
SLLU100 – September 2007 TLK1221 Ethernet Transceiver Evaluation Module (EVM) 7
Submit Documentation Feedback