Datasheet

GND
GNDA
TESTEN
TD0-TD9
REFCLK
PRBSEN
17
22
16
SYNCEN
24
SYNC/PASS
47
10
10
RD0-RD9
2
RBC0-RBC1
ENABLE
28
TCK
49
JTMS
55
JTDI
48
JTRSTN
56
JTDO
27
LOS
26
RBCMODE
32
LOOPEN
19
MODESEL
15
Host
Protocol
Device
JTAG
Controller
VDD VDDA
2.5V
VDDPLL
GNDPLL
5 Ω at100MHz
2.5V
64
18
62
Controlled Impedance
TransmissionLine
TXP
61
ControlledImpedance
TransmissionLine
TXN
54
ControlledImpedance
TransmissionLine
RXP
52
ControlledImpedance
TransmissionLine
RXN
R
t
R
t
50 Ω
50 Ω
TLK1211
0.01 µF
TLK1211RCP
www.ti.com SLLS658D – SEPTEMBER 2006– REVISED APRIL 2011
Figure 12. Typical Application Circuit (AC mode)
DESIGNING WITH PowerPAD
The TLK1211RCP is housed in a high-performance, thermally enhanced, 64-pin VQFP (RCP64) PowerPAD
package. Use of the PowerPAD package does not require any special considerations except to note that the
PowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical
conductor. Therefore, if not implementing PowerPAD PCB features, the use of solder masks (or other assembly
techniques) may be required to prevent any inadvertent shorting by the exposed PowerPAD of connection etches
or vias under the package. It is strongly recommended that the PowerPAD be soldered to the thermal land. The
recommended convention, however, is to not run any etches or signal vias under the device, but to have only a
grounded thermal land as explained below. Although the actual size of the exposed die pad may vary, the
minimum size required for the keepout area for the 64-pin PFP PowerPAD package is 8 mm × 8 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the
PowerPAD package. The thermal land varies in size depending on the PowerPAD package being used, the PCB
construction, and the amount of heat that needs to be removed. In addition, the thermal land may or may not
contain numerous thermal vias depending on PCB construction.
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