Datasheet

TLK110

www.ti.com

SLLS901D –DECEMBER 2011–REVISED JANUARY 2014

Table 8-21. MII Interrupt Status Register 2 (MISR2), address 0x0013 (continued)

BIT NAME DEFAULT DESCRIPTION

5 Page Rec EN 0,RW Enable Interrupt on page receive event

4 Loopback FIFO OF/UF EN 0,RW Enable Interrupt on loopback FIFO overflow/underflow event

3 MDI Crossover Changed EN 0,RW Enable Interrupt on change of MDI/X status

2 Sleep Mode Event EN 0,RW Enable Interrupt sleep mode event

1 Polarity Changed EN 0,RW Enable Interrupt on change of polarity status

0 Jabber Detect EN 0,RW Enable Interrupt on Jabber detection event

8.1.18 False Carrier Sense Counter Register (FCSCR)

This counter provides information required to implement the "False Carriers" attribute within the MAU

managed object class of Clause 30 of the IEEE 802.3u specification.

Table 8-22. False Carrier Sense Counter Register (FCSCR), address 0x0014

BIT NAME DEFAULT DESCRIPTION

15:8 RESERVED 0000 0000, RO RESERVED: Writes ignored, read as 0

7:0 FCSCNT 0,RO / COR False Carrier Event Counter:

This 8-bit counter increments on every false carrier event. This counter stops when it

reaches its maximum count (FFh). When the counter exceeds half full (7Fh), an interrupt

event is generated. This register is cleared on read.

8.1.19 Receiver Error Counter Register (RECR)

This counter provides information required to implement the "Symbol Error During Carrier" attribute within

the PHY managed object class of Clause 30 of the IEEE 802.3u specification.

Table 8-23. Receiver Error Counter Register (RECR), address 0x0015

BIT BIT NAME DEFAULT DESCRIPTION

15:0 RX Error Count 0, RO, / COR RX_ER Counter:

When a valid carrier is present (only while RXDV is set), and there is at least one occurrence of

an invalid data symbol, this 16-bit counter increments for each receive error detected. The

RX_ER counter does not count in MII loopback mode. The counter stops when it reaches its

maximum count of FFFFh. When the counter exceeds half-full (7FFFh), an interrupt is

generated. This register is cleared on read.

Submit Documentation Feedback

Product Folder Links: TLK110