Datasheet

TLK105

TLK106

SLLSEB8A –AUGUST 2012–REVISED MARCH 2013

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8.1.11 Control register 2 (CR2)

Table 8-14. Control register 2 (CR2), address 0x000A

BIT BIT NAME DEFAULT DESCRIPTION

15:14 RESERVED 0, RO RESERVED: Writes ignored, read as 0.

13:7 RESERVED 0, RW RESERVED

6 Fast Link-Up in 0, RW Fast Link-Up in Parallel Detect Mode:

Parallel Detect

1 = Enable Fast Link-Up time During Parallel Detection

0 = Normal Parallel Detection link establishment

In Fast Auto MDI-X and in Robust Auto MDI-X modes (bits 6 and 5 in register CR1), this

bit is automatically set.

5 Extended FD 0, RW Extended Full-Duplex Ability:

Ability

1 = Force Full-Duplex while working with link partner in forced 100B-TX. When the

PHY is set to Auto-Negotiation or Force 100B-TX and the link partner is operated

in Force 100B-TX, the link is always Full Duplex

0 = Disable Extended Full Duplex Ability. Decision to work in Full Duplex or Half

Duplex mode follows IEEE specification.

4 Enhanced LED 0, RW Enhanced LED Link Functionality:

Link

1 = LED Link is ON only when link is established in 100B-TX Full Duplex mode.

0 = LED Link is ON when link is established.

3 Isolate MII in 0, RW Isolate MII outputs when FD Link @ 100BT is not achievable:

100BT HD

1 = When HD link established in 100B-TX MII outputs are isolated

0 = Normal MII outputs operation

2 RXERR During 1, RW Detection of Receive Symbol Error During IDLE State:

IDLE

1 = Enable detection of Receive symbol error during IDLE state

0 = Disable detection of Receive symbol error during IDLE state.

1 Odd-Nibble 0, RW Detection of Transmit Error:

Detection

1 = Disable detection of transmit error in odd-nibble boundary

Disable

0 = Enable detection of de-assertion of TX_EN on an odd-nibble boundary. In this case

TX_EN is extended by one additional TX_CLK cycle and behaves as if TX_ER

were asserted during that additional cycle.

0 RMII Receive 0, RW RMII Receive Clock:

Clock

1 = RMII Data (RXD [1:0]) is sampled and referenced to RX_CLK

0 = RMII Data (RXD [1:0]) is sampled and referenced to XI

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