Datasheet
Table Of Contents
- 1 Introduction
- Table of Contents
- 2 Pin Descriptions
- 3 Configuration
- 4 Interfaces
- 5 Architecture
- 6 Reset and Power Down Operation
- 7 Design Guidelines
- 8 Register Block
- 8.1 Register Definition
- 8.1.1 Basic Mode Control Register (BMCR)
- 8.1.2 Basic Mode Status Register (BMSR)
- 8.1.3 PHY Identifier Register #1 (PHYIDR1)
- 8.1.4 PHY Identifier Register #2 (PHYIDR2)
- 8.1.5 Auto-Negotiation Advertisement Register (ANAR)
- 8.1.6 Auto-Negotiation Link Partner Ability Register (ANLPAR) (BASE Page)
- 8.1.7 Auto-Negotiate Expansion Register (ANER)
- 8.1.8 Auto-Negotiate Next Page Transmit Register (ANNPTR)
- 8.1.9 Auto-Negotiation Link Partner Ability Next Page Register (ANLNPTR)
- 8.2 Register Control Register (REGCR)
- 8.3 Address or Data Register (ADDAR)
- 8.4 Extended Registers
- 8.4.1 PHY Control Register (PHYCR)
- 8.4.2 PHY Status Register (PHYSR)
- 8.4.3 MII Interrupt Mask Register (MINTMR)
- 8.4.4 MII Interrupt Status Register (MINTSR)
- 8.4.5 MII Interrupt Control Register (MINTCR)
- 8.4.6 Receiver Error Counter Register (RECR)
- 8.4.7 BIST Control Register (BISCR)
- 8.4.8 BIST STATUS Register (BISSR)
- 8.4.9 BIST Byte Count Register (BISBCR)
- 8.4.10 BIST Error Count Register (BISECR)
- 8.4.11 BIST Packet Length Register (BISPLR)
- 8.4.12 BIST Inter Packet Gap Register (BISIPGR)
- 8.4.13 LED Direct Control Register (LEDCR)
- 8.4.14 Power Down Register (PDR)
- 8.4.15 False Carrier Sense Counter Register (FCSCR)
- 8.4.16 RX Channel Control Register (RXCCR)
- 8.5 Cable Diagnostic Registers
- 8.5.1 Cable Diagnostic Registers (CDCR)
- 8.5.2 Cable Diagnostic Status Register (CDSR)
- 8.5.3 Cable Diagnostic Results Register (CDRR)
- 8.5.4 TDR State Machine Enable (TDRSMR)
- 8.5.5 TDR Pattern Amplitude Register (TDRPAR)
- 8.5.6 TDR Manual Pulse Register (TDRMPR)
- 8.5.7 TDR Channel Silence Register (TDRCSR)
- 8.5.8 TDR Control Register (TDRCR)
- 8.5.9 TDR Clock Cycles Register (TDRLCR)
- 8.5.10 TDR Low Threshold Register (TDRLT1)
- 8.5.11 TDR Low Threshold Register (TDRLT2)
- 8.5.12 TDR Low Threshold Register (TDRLT3)
- 8.5.13 TDR Low Threshold Register (TDRLT4)
- 8.5.14 TDR High Threshold Register (TDRHT1)
- 8.5.15 TDR High Threshold Register (TDRHT2)
- 8.5.16 TDR High Threshold Register (TDRHT3)
- 8.5.17 TDR High Threshold Register (TDRHT4)
- 8.5.18 TDR Pattern Control Register 1 (TDRLCR1)
- 8.5.19 TDR Pattern Control Register 2 (TDRLCR2)
- 8.5.20 DSA Configuration Register 1 (DSACR1)
- 8.5.21 DSA Configuration Register 2 (DSACR2)
- 8.5.22 DSA Start Frequency (DSASFR)
- 8.5.23 DSA Frequency Control (DSAFCR)
- 8.5.24 DSA Output Control (DSAOCR)
- 8.5.25 RAM Control 1 (RAMCR1)
- 8.5.26 RAM Control 2 (RAMCR2)
- 8.5.27 RAM Data Out (RAMDR)
- 8.5.28 CD Pre Test Configuration Control 1 (CDPTC1R)
- 8.5.29 CD Pre Test Configuration Control 2 (CDPTC2R)
- 8.5.30 LPF Bypass (LPFBR)
- 8.1 Register Definition
- 9 Electrical Specifications
- 10 Appendix A: Digital Spectrum Analyzer (DSA) Output
- Revision History
TLK100
www.ti.com
SLLS931B–AUGUST 2009–REVISED DECEMBER 2009
5.3.3 Jabber Function
Jabber is a condition in which a station transmits for a period of time longer than the maximum permissible
packet length, usually due to a fault condition. The jabber function monitors the TLK100 output and
disables the transmitter if it attempts to transmit a packet of longer than legal size. A jabber timer monitors
the transmitter and disables the transmission if the transmitter is active for approximately 100ms.
When disabled by the Jabber function, the transmitter stays disabled for the entire time that the ENDEC
module's internal transmit enable is asserted. This signal must be de-asserted for approximately 500ms
(the unjab time) before the Jabber function re-enables the transmit outputs.
The Jabber function is only available and active in 10BASE-T mode.
5.3.4 Automatic Link Polarity Detection and Correction
Swapping the wires within the twisted pair causes polarity errors. Wrong polarity affects the 10B-T PHYs.
The 100B-TX is invulnerable to polarity problems because it uses MLT3 encoding. The 10B-T
automatically detects reversed polarity according to the received link pulses or data.
5.3.5 10Base-T Transmit and Receive Filtering
External 10BASE-T filters are not required when using the TLK100, as the required signal conditioning is
integrated into the device. Only isolation transformers and impedance matching resistors are required for
the 10BASE-T transmit and receive interface. The internal transmit filtering ensures that all the harmonics
in the transmit signal are attenuated by at least 30dB.
5.3.6 10Base-T Operational Modes
The TLK100 has two basic 10BASE-T operational modes:
• Half Duplex mode – In Half Duplex mode the TLK100 functions as a standard IEEE 802.3 10BASE-T
transceiver supporting the CSMA/CD protocol.
• Full Duplex mode – In Full Duplex mode the TLK100 is capable of simultaneously transmitting and
receiving without asserting the collision signal. The TLK100 10 Mb/s ENDEC is designed to encode
and decode simultaneously.
5.4 Auto MDI/MDI-X Crossover
The auto MDI/MDI-X crossover function detects wire crossover (also referred to as MDI/MDI-X). It
automatically performs the pair swaps such that each transmitter is connected to its link partner receiver
and vice versa, without using an external crossed cable. The auto MDI/MDI-X crossover function is
capable of establishing a link with PHYs that do not implement a cross over mechanism.
Table 5-2. MDI/MDI-X Pair Swaps Combinations
MDI MDI-X
PIN
10B-T 100B-TX 10B-T 100B-TX
TD± (pin 8,9) TD TD RD RD
RD± (pin 5,6) RD RD TD TD
Detecting link pulses or energy on one or more of the MDI pins determines the crossover state and
whether there is a need to perform a swap. If both link partners implement the MDI/MDI-X crossover, then
a random algorithm, compliant with one described in IEEE 802.3 section 40.4.4 is used. If the other link
partner is a legacy 10B-T PHY then the same algorithm is used. If the other link partner is a legacy
100B-TX PHY, then the crossover state is determined according to the signal detection function.
As described, the link partners’ configuration and abilities, whether they use the auto negotiation and/or
activate a crossover mechanism, greatly influence the method picked by the crossover function to
Copyright © 2009, Texas Instruments Incorporated Architecture 31
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