Datasheet

www.ti.com
TLK10034 EVM Voltage Monitor Board Layout
Table 3. TLK10034 EVM Voltage Monitor Board Layer Construction
Subclass Dielectric Coupling Type / Spacing
Type Material Thickness (MIL) Width (MIL)
Name Constant (MIL)
SURFACE AIR 1
TOP CONDUCTOR COPPER 2 1 8.5 (Single) None/None (Single)
DIELECTRIC FR-4 5 4.5
L2_GND PLANE COPPER 1.2 1
DIELECTRIC FR-4 45 4.5
L3_PWR PLANE COPPER 1.2 1
DIELECTRIC FR-4 5 4.5
BOTTOM CONDUCTOR COPPER 2 1 8.5 (Single) None/None (Single)
SURFACE AIR
NOTE: The impedance is set at slightly less than 50 or 100 Ω on the traces to compensate for slight
over-etching during the manufacturing process. The end impedance after etching should
result in a 50- or 100-Ω impedance. Always consult with your board manufacturer for their
process and design requirements, ensuring the desired impedance is achieved.
69
SLLU168August 2012 TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation
Module (EVM)
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated