Datasheet

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
J22
HSRXDP
EDGE LAUNCH
C262 0.1uF
R291 0R290 0
J18
HSRXCP
EDGE LAUNCH
C263 0.1uF
J16
HSTXCP
EDGE LAUNCH
J21
HSTXDN
EDGE LAUNCH
TLK10034
U1C
HSTXCP
A14
HSTXCN
A15
HSRXCP
A12
HSRXCN
A11
TLK10034
U1D
HSTXDP
V11
HSTXDN
V10
HSRXDP
V13
HSRXDN
V14
C264 0.1uF
R292 0
J23
HSRXDN
EDGE LAUNCH
J20
HSTXDP
EDGE LAUNCH
C265 0.1uF
J19
HSRXCN
EDGE LAUNCH
J17
HSTXCN
EDGE LAUNCH
R293 0
HSTXCP_SMA
HSTXCN_SMA
HSRXCP_SMA
HSRXCN_SMA
HSRXDP
HSTXDP_SMA
HSTXDN_SMAHSTXCN
HSRXDP_SMA
HSTXCP
HSRXDN_SMA
HSRXCP
HSRXDNHSRXCN
HSTXDN
HSTXDP
THE HIGH SPEED TX LINES SHOULD BE AC COUPLED IN
THE SYSTEM WITH 0.1uF CAPACITORS FOR PROPER
OPERATION. ZERO OHM RESISTORS ARE INSTALLED ON
THIS BOARD TO ALLOW FOR EXTERNAL LOOPBACK BETWEEN
THE HSTXB AND HSRXB UTILIZING THE AC CAPACITORS
ON THE HSRXB PINS. THE ZERO OHM RESISTORS CAN BE
REPLACED WITH 0.1uF CAPACITORS IF AC COUPLING
CAPACITORS ARE NEEDED ON THESE SIGNALS.
CHANNEL C & D HIGH SPEED DATA SIGNALS
B NA6542779 14 of 16
REV SHEETDOCUMENT NUMBERSIZE
TEXAS INSTRUMENTS
PAGE TITLE
TLK10034 EVM Motherboard Schematics www.ti.com
Figure 21. TLK10034 EVM Schematic, Channel C & D High Speed Data Signals (Sheet 14 of 16)
30
TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation Module SLLU168–August 2012
(EVM)
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