Datasheet
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
R224 0 R225 0
R220 0
TLK10034
U1F
INB0P
L1
INB0N
M1
INB1P
P1
INB1N
R1
INB2P
T2
INB2N
U2
INB3P
U1
INB3N
V1
OUTB0P
K2
OUTB0N
J2
OUTB1P
L3
OUTB1N
K3
OUTB2P
N4
OUTB2N
M4
OUTB3P
R3
OUTB3N
P3
C229 0.1uF
R216 0
R221 0
C225 0.1uF
C222 0.1uF
R212 0
R217 0
R213 0
C224 0.1uF
C221 0.1uF
R227 0
C217 0.1uF
R226 0
R222 0
C230 0.1uF C231 0.1uF
C228 0.1uF
R218 0
C220 0.1uF
R223 0
R214 0
R219 0
C227 0.1uF
C223 0.1uF
R215 0
C216 0.1uF
C219 0.1uF
C226 0.1uF
TLK10034
U1E
INA0P
A3
INA0N
A2
INA1P
B2
INA1N
B1
INA2P
D1
INA2N
E1
INA3P
G1
INA3N
H1
OUTA0P
C3
OUTA0N
D3
OUTA1P
D4
OUTA1N
E4
OUTA2P
F3
OUTA2N
G3
OUTA3P
H4
OUTA3N
J4
C218 0.1uF
OUTA0N
OUTA0P
INA0P
INA0N
INA1P
INA1N
INA2P
INA2N
INA3P
INA3N
OUTA3N
OUTA3P
OUTB0N
OUTB0P
INB0P
INB0N
INB1P
OUTA2N
INB1N
INB2P
INB2N
INB3P
INB3N
OUTB3N
OUTB3P
OUTB2N
OUTB2P
OUTB1N
OUTB1P
OUTA2P
OUTA1N
OUTA1P
OUTB1P_CONNECTOR
15
OUTB1N_CONNECTOR
15
OUTB2P_CONNECTOR
15
OUTB2N_CONNECTOR
15
INB0P_CONNECTOR
15
INB0N_CONNECTOR
15
INB1P_CONNECTOR
15
OUTB3P_CONNECTOR
15
OUTB3N_CONNECTOR
15
INB1N_CONNECTOR
15
INB2P_CONNECTOR
15
INB2N_CONNECTOR
15
INB3P_CONNECTOR
15
INB3N_CONNECTOR
15
INA0P_CONNECTOR
15
INA0N_CONNECTOR
15
INA1P_CONNECTOR
15
INA1N_CONNECTOR
15
INA2P_CONNECTOR
15
OUTA0P_CONNECTOR
15
INA2N_CONNECTOR
15
INA3P_CONNECTOR
15
INA3N_CONNECTOR
15
OUTA0N_CONNECTOR
15
OUTA1P_CONNECTOR
15
OUTA1N_CONNECTOR
15
OUTA2P_CONNECTOR
15
OUTA2N_CONNECTOR
15
OUTA3P_CONNECTOR
15
OUTA3N_CONNECTOR
15
OUTB0P_CONNECTOR
15
OUTB0N_CONNECTOR
15
NOTE:
1. MATCH LOW SPEED INPUT AND OUTPUT TRACE LENGTHS TO EACHOTHER
2. MATCH HIGH SPEED TRANSMIT AND RECEIVE TRACE LENGTHS TO EACHOTHER
CHANNEL A & B LOW SPEED DATA SIGNALS
B NA6542779 10 of 16
REV SHEETDOCUMENT NUMBERSIZE
TEXAS INSTRUMENTS
PAGE TITLE
TLK10034 EVM Motherboard Schematics
www.ti.com
Figure 17. TLK10034 EVM Schematic, Channel A & B Low Speed Data Signals (Sheet 10 of 16)
26
TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation Module SLLU168–August 2012
(EVM)
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