Datasheet
le (EVM) User’s Guide
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB, MDIO, JTAG, AND I2C INTERFACE
R180 4.02K
C195
1uF
TLK10034
U1P
TDI
E12
TDO
G14
TMS
E14
TCK
E13
TRST_N
H13
R161 DNI_0
R199
DNI_4.99K
K2
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
R193
DNI_2K
JMP28
Header 2x2
1
3
2
4
R178 4.99K
JMP33
3 Pin Berg
1
2
3
R167 0
R305 100
R211 0
R168
0
R181 4.02K
R160 0
R196
DNI_2K
JMP32
Header 2x6
1
3
5
7
9
2
4
6
8
10
11 12
R296 4.99K
R187
0
SW5
1
3
5
7
2
4
6
8
ON
K1
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
R186
0
J1A
MEC1-120-02-F-D-A Connector
1
1
3
3
5
5
7
7
9
9
11
11
13
13
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
R191
DNI_4.99K
Q20
FDV301N
G
S
D
R210 0
Q19
FDV301N
G
S
D
R156 4.02K
Q22
FDV301N
G
S
D
R175 4.99K
R179 4.99K
R294 100
JMP29
Header 2x2
1
3
2
4
U19
TXB0108PWR
A1
1
VCCA
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
OE
10
B1
20
VCCB
19
B2
18
B3
17
B4
16
B5
15
B6
14
B7
13
B8
12
GND
11
R189
0
K3
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
U17D
TCA6424
GND
25
ADDR
26
VCCP
27
RESET
28
SCL
29
SDA
30
VCCI
31
INT
32
PP
33
R165 DNI_0
R192 DNI_0
R182 DNI_0
R171
0
R198
DNI_4.99K
R188
0
Q18
FDV301N
G
S
D
R306 4.99K
C193 1uF
R299 4.99K
R197
0
R205 0
R201 4.99K
J1B
MEC1-120-02-F-D-A Connector
2
2
4
4
6
6
8
8
10
10
12
12
14
14
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
R172 DNI_0
Q17
FDV301N
G
S
D
R295 100
R164 0
R190
0
R174 4.99K
JMP30
Header T 4 Pin
1
2
3
4
R184 0
TLK10034
U1O
PRTAD4
M5
PRTAD3
N14
PRTAD2
P12
PRTAD1
F14
PRTAD0
N12
MDC
G5
MDIO
F5
SW3
1
3
5
7
2
4
6
8
ON
R173 DNI_0
U27
SN74AHC1G02DBV
A
1
B
2
GND
3
VCC
5
Y
4
NOR
R207 0
R170
0
R202 0
U18
TXS0108EPWR
A1
1
VCCA
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
OE
10
B1
20
VCCB
19
B2
18
B3
17
B4
16
B5
15
B6
14
B7
13
B8
12
GND
11
K6
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
R204 0
R194 0
R203 0
R166 0
R304 4.99K
R209 0
JMP43
Header 2x1
1 2
R206 0
K5
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
JMP35
Header 2x5
1
3
5
7
9
2
4
6
8
10
K4
G3VM-21LR10
CTRL
1
GND
2
T2
3
T1
4
R162 0
R159 DNI_2K
C192
1uF
R208 0
C194
1uF
R183 DNI_0
R195 4.99K
R298 4.99K
R176 4.99K
R158 DNI_2K
R297 4.99K
R185 0
R157 4.02K
R200
DNI_4.99K
Q21
FDV301N
G
S
D
R177 4.99K
R163 0
R169
0
MDC_POST_LS
MDIO_POST_LS
MDC_DUT
MDIO_DUT
PRTAD1
PRTAD4
MDC_PRE_LS
MDC
MDIO
I2C_GPIO_ADDR
I2C_INT1_SOURCE
I2C_RESET1_SOURCE
I2C_GPIO_INT
I2C_GPIO_SDA
I2C_GPIO_RESET
I2C_SDA_SOURCE
EXT_I2C_INT1
EXT_I2C_RESET1
EXT_I2C_SDA
EXT_I2C_SCL
I2C_SCL_SOURCE USB_I2C_SCL
USB_I2C_SDA
USB_I2C_RESET1
USB_I2C_INT1
PRTAD0PRTAD0
MDIO_LS_EN
MDIO_CON
MDC_CON
MDIO_PRE_LS
MDC_LS_BY
MDIO_LS_BY
MDC_BYPASS
MDIO_USB
MDC_USB
TCK
TMS
TDI
TDO
TRST_N TRST_N_LS
TDO_LS
TDI_LS
TMS_LS
JTAG_LS_EN
TCK_LS
JTAG_LS_VCCB
MDIO_C
MDC_C
USB_RESET2
USB_INT2
EXT_I2C_RESET2
EXT_I2C_INT2
I2C_RESET2_SOURCE
I2C_INT2_SOURCE
I2C_GPIO_SCL
PRTAD3
MDC_OUT_POST_LS
PRTAD2
CHC/D_R_INV
MDIO_BYPASS
HDR_R_INV
JTAG_LS_VCCB_3V
MDIO_HDR
MDC_HDR
CHC/D_R
HDR_R
CHA/B_R_INV
CHA/B_R
HDR_R_CNT
MDIO_OUT_POST_LS
VDDO
2P5V
VDDO
VDDO
3P3V
3P3V
3P3V3P3V
MDIO_LS
MDIO_LS
MDIO_LS
5V_USB3P3V_USB
VDDO
VDDO
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
3P3V
CHA/B_MDC_POST_LS_CONNECTOR
15
CHA/B_MDIO_POST_LS_CONNECTOR
15
CHC/D_MDIO_RELAY
7
CHA/B_MDIO_RELAY
7
CHC/D_MDC_POST_LS_CONNECTOR
16
CHC/D_MDIO_POST_LS_CONNECTOR
16
MDIO INTERFACE
MDIO BUS OUTPUT
CONNECTOR
(LEVEL SHIFTED)
BI-DIRECTIONAL
LEVEL SHIFTER
OVERLAP RESISTOR PADS
I2C CONTROL
INTERFACE
I2C-TO-GPIO CONTROL PINS
I2C BUS CONNECTOR
OVERLAP RESISTOR PADSDO NOT OVERLAP
RESISTOR PADS, BUT
PLACE DIRECTLY UNDER
DUT AS CLOSE AS
POSSIBLE TO THE DUT
PINS AND EACHOTHER.
OVERLAP RESISTOR PADS OF R264 AND
R255, R265, AND R259. PLACE
RESISTOR PADS OF R254 AND R258 AS
CLOSE TO THE OVERLAPPED RESISTORS
AS POSSIBLE.
USB DONGLE INTERFACE
USB MDIO BUS
USB I2C BUS
PRTAD ADDRESS HEADER
JTAG INTERFACE
BI-DIRECTIONAL LEVEL SHIFTER
DO NOT OVERLAP 0-OHM RESISTOR PADS.
PLACE 0-OHM RESISTORS AS CLOSE TOGETHER
AS POSSIBLE AND AS CLOSE TO THE TCA6424
DEVICE TO MINIMIZE THE STUBS ON THE I2C
BUS.
ROUTE THE MDIO/MDC
SIGNALS THROUGH THE PADS
OF THE RELAYS TO MINIMIZE
THE STUBS AND PLACE THE
RELAYS AS CLOSE TO THE
HEADER PINS AS POSSIBLE
TO MINIMIZE THE STUBE DUE
TO THE HEADER PIN.
B NA6542779 8 of 16
REV SHEETDOCUMENT NUMBERSIZE
TEXAS INSTRUMENTS
PAGE TITLE
TLK10034 EVM Motherboard Schematics
www.ti.com
Figure 15. TLK10034 EVM Schematic, USB, MDIO, JTAG, and I
2
C Interface (Sheet 8 of 16)
24
TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation Module SLLU168–August 2012
(EVM)
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