5
VCCMGT
_1P2V
VCCINT
_1P2V
3P3V
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TLK10002EVM FPGA Daughterboard Layout
Figure 58. Internal Power, Layer 5
77
SLLU148– May 2011 TLK10002 Dual-Channel, 10-Gbps, Multi-Rate Transceiver Evaluation Module
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