Datasheet

TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts , the model generation software used
with Microsim
PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 36 and Figure 37 were
generated using the TLE2161 typical electrical and operating characteristics at 25
°
C. Using this information,
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
• Maximum positive output voltage swing
• Maximum negative output voltage swing
• Slew rate
• Quiescent power dissipation
• Input bias current
• Open-loop voltage amplification
• Gain-bandwidth product
• Common-mode rejection ratio
• Phase margin
• DC output resistance
• AC output resistance
• Short-circuit output current limit
4
dlp
ro2
99
V
CC –
IN +
IN –
V
CC+
OUT
8
5
ro1
–
+
vlim
7
vb
9
egnd
fb
92
dln
9190
vlnvlphlim
+
––
–
++
+
+
–
–
6
53
–
vc
+
r2
C2
gagcm
dc
de
54
ve
–+
rd2rd1
C1
rss
3
iss
10
11 12
j2j1
1
2
dp
rp
Figure 36. Boyle Macromodel
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, ”Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE
Journal
of Solid-State Circuits , SC-9, 353 (1974).
PSpice and Parts are trademark of MicroSim Corporation.