Datasheet

TLE2141-Q1
www.ti.com SLOS525 –SEPTEMBER 2011
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
V
IO
Input offset voltage Distribution Figure 2
I
IO
Input offset current vs Free-air temperature Figure 3
vs Common-mode input voltage Figure 4
I
IB
Input bias current
vs Free-air temperature Figure 5
vs Supply voltage Figure 6
vs Free-air temperature Figure 7
V
OM+
Maximum positive peak output voltage
vs Output current Figure 8
vs Settling time Figure 10
vs Supply voltage Figure 6
vs Free-air temperature Figure 7
V
OM–
Maximum negative peak output voltage
vs Output current Figure 9
vs Settling time Figure 10
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency Figure 11
V
OH
High-level output voltage vs Output current Figure 12
V
OL
Low-level output voltage vs Output current Figure 13
Phase shift vs Frequency Figure 14
vs Frequency Figure 14
A
VD
Large-signal differential voltage amplification
vs Free-air temperature Figure 15
z
o
Closed-loop output impedance vs Frequency Figure 16
I
OS
Short-circuit output current vs Free-air temperature Figure 17
vs Frequency Figure 18
CMRR Common-mode rejection ratio
vs Free-air temperature Figure 19
vs Frequency Figure 20
k
SVR
Supply-voltage rejection ratio
vs Free-air temperature Figure 21
vs Supply voltage Figure 22
I
CC
Supply current
vs Free-air temperature Figure 23
V
n
Equivalent input noise voltage vs Frequency Figure 24
V
n
Input noise voltage Over a 10-second period Figure 25
I
n
Noise current vs Frequency Figure 26
THD+N Total harmonic distortion plus noise vs Frequency Figure 27
vs Free-air temperature Figure 28
SR Slew rate
vs Load capacitance Figure 29
Noninverting large signal vs Time Figure 30
Pulse response Inverting large signal vs Time Figure 31
Small signal vs Time Figure 32
B
1
Unity-gain bandwidth vs Load capacitance Figure 33
Gain margin vs Load capacitance Figure 34
φ
m
Phase margin vs Load capacitance Figure 35
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