Datasheet

−400
12
8
4
0
0
Percentage of Units − %
16
20
24
400 800
TLE2141
DISTRIBUTION OF
INPUT OFFSET VOLTAGE
V
IO
− Input Offset Voltage − µV
236 Units Tested From 1 Wafer Lot
V
CC
±
= ±15 V
T
A
= 25°C
P Package
−800
−400
12
8
4
0
0
Percentage of Units − %
16
20
24
400 800
TLE2142
DISTRIBUTION OF
INPUT OFFSET VOLTAGE
V
IO
− Input Offset Voltage − µV
236 Units Tested From 1 Wafer Lot
V
CC
±
= ±15 V
T
A
= 25°C
P Package
−800
−200
200 600
−600
12
8
4
0
−1.6 0
Percentage of Units − %
16
20
24
0.8 1.6
TLE2144
DISTRIBUTION OF
INPUT OFFSET VOLTAGE
V
IO
− Input Offset Voltage − mV
V
CC
±
= ±15 V
T
A
= 25°C
N Package
250 Units Tested From 1 Wafer Lot
−0.8
− 2 −1.2
−0.4
0.4 1.2 2
10
8
4
2
0
18
6
IIO − Input Offset Current − nA
14
12
16
20
I
IO
INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
−75 −50 −25 0 25 50 75 100 125
T
A
− Free-Air Temperature − °C
150
V
CC
±
= ±15 V
V
CC
±
= ±2.5 V
V
O
= 0
V
IC
= 0
TLE2141-EP
TLE2142-EP
TLE2144-EP
SLOS577 – MAY 2008 ........................................................................................................................................................................................................ www.ti.com
Figure 1. Figure 2.
Figure 3. Figure 4.
18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TLE2141-EP TLE2142-EP TLE2144-EP