Datasheet

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SLAS063B − APRIL 1989 − REVISED MARCH 2007
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics over recommended ranges of operating free-air temperature and V
DD
,
V
refA
= V
refB
= 10 V, V
OA
and V
OB
at 0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Linearity error ± 1/2 LSB
Settling time (to 1/2 LSB) See Note 1 100 ns
Gain error
See Note 2
Full range ± 3
LSB
Gain error See Note 2
25°C ± 2
LSB
AC feedthrough
REFA to OUTA
See Note 3
Full range −65
dB
AC feedthrough
REFB to OUTB
See Note 3
25°C −75
dB
Temperature coefficient of gain ± 0.0035 %FSR/°C
Propagation delay (from digital input to
90% of final analog output current)
See Note 4 80 ns
Channel-to-channel
REFA to OUTB See Note 5 25°C 80
dB
Channel-to-channel
isolation
REFB to OUTA See Note 6 25°C 80
dB
Digital-to-analog glitch impulse area
Measured for code transition from 00000000 to 11111111,
T
A
= 25°C
330 nVs
Digital crosstalk
Measured for code transition from 00000000 to 11111111,
T
A
= 25°C
60 nVs
Harmonic distortion V
i
= 6 V, f = 1 kHz, T
A
= 25°C −85 dB
NOTES: 1. OUTA, OUTB load = 100 , C
ext
= 13 pF; WR and CS at 0 V; DB0−DB7 at 0 V to V
DD
or V
DD
to 0 V.
2. Gain error is measured using an internal feedback resistor. Nominal full scale range (FSR) = V
ref
− 1 LSB. Both DAC latches are
loaded with 11111111.
3. V
ref
= 20 V peak-to-peak, 10-kHz sine wave
4. V
refA
= V
refB
= 10 V; OUTA/OUTB load = 100 , C
ext
= 13 pF; WR
and CS at 0 V; DB0−DB7 at 0 V to V
DD
or V
DD
to 0 V.
5. V
refA
= 20 V peak-to-peak, 10-kHz sine wave; V
refB
= 0
6. V
refB
= 20 V peak-to-peak, 10-kHz sine wave; V
refA
= 0
t
h(DAC)
t
h(CS)
t
su(CS)
t
su(DAC)
t
w(WR)
t
h(D)
t
su(D)
Data In Stable
DB0DB7
WR
CS
DACA/DACB
1.3 V
1.3 V
3.5 V
0.3 V
3.5 V
3.5 V
3.5 V
0.3 V
0.3 V
0.3 V
For all input signals, t
r
= t
f
= 5 ns (10% to 90% points).
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
Figure 1. Setup and Hold Times