Datasheet

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SLAS063B − APRIL 1989 − REVISED MARCH 2007
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
DD
10.8 15.75 V
Reference voltage, V
refA
or V
refB
± 10 V
High-level input voltage, V
IH
2.4 V
Low-level input voltage, V
IL
0.8 V
CS setup time, t
su(CS)
50 ns
CS hold time, t
h(CS)
(see Figure 1) 0 ns
DAC select setup time, t
su(DAC)
(see Figure 1) 60 ns
DAC select hold time, t
h(DAC)
(see Figure 1) 10 ns
Data bus input setup time t
su(D)
(see Figure 1) 25 ns
Data bus input hold time t
h(D)
(see Figure 1) 10 ns
Pulse duration, WR low, t
w(WR)
(see Figure 1) 50 ns
Operating free-air temperature, T
A
TLC7628C 0 +70 °C
electrical characteristics over recommended ranges of operating free-air temperature and V
DD
,
V
refA
= V
refB
= 10 V, V
OA
and V
OB
at 0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
I
IH
High-level input current
V
I
= V
DD
Full range 10
A
I
IH
High-level input current V
I
= V
DD
25°C 1
µA
I
IL
Low-level input current
V
I
= 0
Full range −10
A
I
IL
Low-level input current V
I
= 0
25°C −1
µA
Reference input impedance REFA or REFB to
AGND
5 20 k
OUTA
DAC data latch loaded with 00000000,
Full range ± 200
I
kg
OUTA
DAC data latch loaded with 00000000,
V
refA
= ± 10 V
25°C ± 50
nA
I
kg
Output leakage current
OUTB
DAC data latch loaded with 00000000,
Full range ± 200
nA
OUTB
DAC data latch loaded with 00000000,
V
refB
= ± 10 V
25°C ± 50
Input resistance match (REFA to REFB) ±1%
DC supply sensitivity gain/V
DD
V
DD
= ± 5 %
Full range 0.02
%/%
DC supply sensitivity gain/V
DD
V
DD
= ± 5 %
25°C 0.01
%/%
Quiescent All digital inputs at V
IH
min or V
IL
max 2
I
DD
Supply current
Standby
All digital inputs at 0 V or V
DD
Full range 0.5
mA
I
DD
Standby All digital inputs at 0 V or V
DD
25°C 0.1
mA
DB0DB7 10
C
i
Input capacitance
WR
, CS,
DACA
/DACB
15
pF
C
o
Output capacitance (OUTA, OUTB)
DAC data latches loaded with 00000000 25
pF
C
o
Output capacitance (OUTA, OUTB)
DAC data latches loaded with 11111111 60
pF