Datasheet

  
  
 
SLAS062E − JANUARY 1987 − REVISED NOVEMBER 2008
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
microprocessor interface information
A + 1
A
A8−A15
CPU
8051
WR
ALE
TLC7528
DACA/DACB
CS
WR
DB0
DB7
AD0−AD7
Data Bus
Address Bus
Latch
Address
Decode
Logic
NOTE A: A = decoded address for TLC7528 DACA
A + 1 = decoded address for TLC7528 DACB
8
8
Figure 5. TLC7528: Intel 8051 Interface
φ 2
Address
Decode
Logic
Address Bus
Data Bus
AD0−AD7
DB7
DB0
WR
CS
DACA/DACB
TLC7528
VMA
CPU
6800
A8−A15
A
A + 1
NOTE A: A = decoded address for TLC7528 DACA
A + 1 = decoded address for TLC7528 DACB
8
8
Figure 6. TLC7528: 6800 Interface