Datasheet

  
  
 
SLAS062E − JANUARY 1987 − REVISED NOVEMBER 2008
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
These devices are capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant and 4-quadrant multiplication are shown in Figure 3 and Figure 4. Table 1 and Table 2 summarize
input coding for unipolar and bipolar operation, respectively.
DGND
V
OB
V
OA
V
I(B)
± 10 V
R3 (see Note A)
R1 (see Note A)
AGND
+
−
C1
(see Note B)
C2
(see Note B)
R2 (see Note A)
R4 (see Note A)
+
−
AGND
OUTB
RFBB
AGND
OUTA
5
V
DD
17
7
14
DACA
/DACB
DB0
DB7
Input
Buffer
8
8
8
8
REFB
RFBA
REFA
Latch
Control
Logic
CS
WR
16
15
6
RECOMMENDED TRIM
RESISTOR VALUES
R1, R3
R2, R4
500 Ω
150 Ω
DACA
DACB
Latch
V
I(A)
± 10 V
NOTES: A. R1, R2, R3, and R4 are used only if gain adjustment is required. See table for recommended values. Make gain adjustment with
digital input of 255.
B. C1 and C2 phase compensation capacitors (10pF to 15pF) are required when using high-speed amplifiers to prevent ringing or
oscillation.
Figure 3. Unipolar Operation (2-Quadrant Multiplication)