Datasheet

  
   
SLAS061D − SEPTEMBER 1986 − REVISED JUNE 2007
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
microprocessor interfaces
A0−A15
Z−80A
D0−D7
WR
IORQ
Address Bus
Decode
Logic
TLC7524
OUT2
OUT1
CS
WR
DB0−DB7
Data Bus
Figure 5. TLC7524: Z-80A Interface
Data Bus
DB0−DB7
WR
CS
OUT1
OUT2
TLC7524
Decode
Logic
Address Bus
VMA
φ2
D0−D7
6800
A0−A15
Figure 6. TLC7524: 6800 Interface