Datasheet

  
   
SLAS060F − JANUARY 1995 − REVISED APRIL 2009
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
interface logic information (continued)
17
16
15
A0
A1
WR
To Latch A
To Latch B
To Latch C
To Latch D
Figure 6. Input Control Logic
unipolar output operation
The unipolar output operation is the basic mode of operation for each channel of the TLC7226, with the output
voltages having the same positive polarity as V
ref
. The TLC7226 can be operated with a single power supply
(V
SS
= AGND) or with positive/negative power supplies. The voltage at V
ref
must never be negative with respect
to AGND to prevent parasitic transistor turnon. Connections for the unipolar output operation are shown in
Figure 7. Transfer values are shown in Table 3.
_
+
DAC A
_
+
DAC B
_
+
DAC C
_
+
DAC D
4
REF
2
1
20
19
OUTA
OUTB
OUTC
OUTD
Figure 7. Unipolar Output Circuit
LSBMSB
DAC LATCH CONTENTS
ANALOG OUTPUT
) V
ref
ǒ
255
256
Ǔ
1111 1111
) V
ref
ǒ
129
256
Ǔ
1000 0001
1000 0000
) V
ref
ǒ
128
256
Ǔ
+)
V
ref
2
0111 1111 ) V
ref
ǒ
127
256
Ǔ
0000 0001 ) V
ref
ǒ
1
256
Ǔ
0000 0000 0 V
NOTE A. 1 LSB +
ǒ
V
ref
2
–8
Ǔ
+ V
ref
ǒ
1
256
Ǔ
Table 3. Unipolar Code