Datasheet

 
  
 
SLAS074D − DECEMBER 1986 − REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTIONAL BLOCK DIAGRAM
17
12
18
8
A/Z, DE(
±), Z/I
INT
BUFF
OUT
6
ANLG
COMMON
IN−
IN+
REF
9
3
10
2
A/Z
INT
Z/I
A/Z
DE(+)
DE(−)
DE(+) DE(−)
A/Z
Input
Low
Input
High
A/Z
Buffer
+
−
+
−
+
−
Comparator
Integrator
7
C
ref+
C
ref
R
INT
C
AZ
ANALOG SECTION
Binary
Coded
Decima
l
Output
B4
15
B2
14
16
B8 (MSB)
13
B1 (LSB)
Digit
Drive
Output
D5 (MSD)
D4
D3
D2
D1 (LSD)
19
20
Multiplexer
Latch
Latch
Latch
Latch
Latch
Counters
Control
Logic
Zero
Cross
Detect
Polarity
Flip-Flop
DGTL GND
BUSY
STROBE
UNDER RANGE
OVER RANGE
RUN/HOLD
CLK
POLARITY
From Analog
Section
24
21
26
28
27
25
22
23
C
INT
INT OUT
4
To
Digital
Section
5
C
ref−
DIGITAL SECTION
AUTO
ZERO