Datasheet

TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
C1
D1
C3
C4
C5
C6
C2
C11
C9
C7
C8
C10
C12
R5
R4 R2
R1
Q1
D3
D2
TP3
R3
C11
FB2
FB3
FB7
FB1
V
REF
ADJ
TP1
J1
V
DDD
V
DDA
V
DDA
REFTS
REFT
V
DDA
ANALOG IN
AGND
AGND
REFBS
REFB
DGND
12
11
10
9
8
7
6
5
4
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
CLK
V
DDD
D8 (MSB)
D7
D6
D5
D4
D3
D2
D1 (LSB)
DGND
OE
TLC5510
AV
DD
5 V
Clock
Output
Enable
DV
DD
5 V
Video
Input
JP2JP1
JP4JP3
– 5 V
NOTE A: Shorting JP1 and JP3 allows adjustment of the reference voltage by R5 using temperature-compensating diodes D2 and D3
which compensate for D1 and Q1 variations. By shorting JP2 and JP4, the internal divider generates a nominal 2-V reference.
LOCATION DESCRIPTION
C1, C3–C4, C6–C12 0.1-µF capacitor
C2 10-pF capacitor
C5 47-µF capacitor
FB1, FB2, FB3, FB7 Ferrite bead
Q1 2N3414 or equivalent
R1, R3 75-Ω resistor
R2 500-Ω resistor
R4 10-kΩ resistor, clamp voltage adjust
R5 300-Ω resistor, reference-voltage fine adjust
Figure 5. TLC5510 Evaluation and Test Schematic