Datasheet

TLC3544, TLC3548
5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL
ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
SLAS266C – OCTOBER 2000 – REVISED MAY 2003
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
general electrical characteristics over recommended operating free-air temperature range,
single-ended input, normal long sampling, 200 KSPS, AV
DD
= 5 V, external reference (V
REFP
= 4 V,
V
REFM
= 0 V) or internal reference, SCLK frequency = 25 MHz, fixed channel at CONV mode 00,
analog input signal source resistance = 25 Ω (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
Resolution 14 bits
Analog Input
Voltage range 0 Reference V
Leakage current 0.01 0.05 µA
Capacitance 30 pF
Reference
Internal reference voltage 3.85 4 4.07 V
Internal reference temperature
coefficient
100 ppm/°C
Internal reference source current 1.8 2.5 mA
Internal reference startup time 20 ms
V
REFP
External positive reference voltage 3 5 V
V
REFM
External negative reference voltage 0 AGND V
No conversion (AV
DD
= 5 V,
CS
= DV
DD
, SCLK = DGND)
100 MΩ
External reference input impedance
Normal long sampling (AV
DD
= 5 V,
CS
= DGND, SCLK = 25 MHz,
External conversion clock)
8.3 12.5 kΩ
External reference current
No conversion (V
REFP
= AV
DD
= 5 V,
V
REFM
= AGND, External reference,
CS = DV
DD
)
1.5 µA
External reference current
Normal long sampling (AV
DD
= 5 V,
CS
= DGND, SCLK = 25 MHz external
conversion clock at V
REF
= 5 V)
0.4 0.6 mA
Throughput Rate
f Internal oscillation frequency DV
DD
= 2.7 V to 5.5 V 6.5 MHz
Internal OSC, 6.5 MHz minute 2.785
t
(conv)
Conversion time
Conversion clock is external source,
SCLK = 25 MHz (see Note 1)
2.895
µs
Acquisition time Normal short sampling 1.2 µs
Throughput rate (see Note 2)
Normal long sampling, fixed channel in mode
00 or 01
200 KSPS
DC Accuracy—Normal Long Sampling
E
L
Integral linearity error See Note 3 –1 ±0.5 1 LSB
E
D
Differential linearity error –1 ±0.5 1 LSB
E
O
Zero offset error See Note 4 –3 ±0.6 3 LSB
E
(g+)
Gain error See Note 4 0 5 12 LSB
†
All typical values are at T
A
= 25°C.
NOTES: 1. Conversion time t
(conv)
= (18x4 / SCLK) + 15 ns.
2. This is for a fixed channel in conversion mode 00 or 01. When switching the channels, additional multiplexer setting time is required
to overcome the memory effect of the charge redistribution DAC (refer to Figure 8).
3. Linear error is the maximum deviation from the best fit straight line through the A/D transfer characteristics.
4. Zero offset error is the difference between 0000000000000 and the converted output for zero input voltage; gain error is the
difference between 11111111111111 and the converted output for full-scale input voltage. The full-scale input voltage is equal to the
reference voltage being used.