Datasheet

  
   
7
WWW.TI.COM
switching characteristics, V
DD
= 5 V, T
A
= 25°C (see Figure 3)
PARAMETER TEST CONDITIONS
TLC139M, TLC339C
TLC339I, TLC339M
TLC339Q
UNIT
MIN TYP MAX
Overdrive = 2 mV 4.5
f = 10 kHz,
Overdrive = 5 mV 2.5
t
PLH
Propagation delay time, low-to-high output
f = 10 kHz,
C
L
= 15 pF
Overdrive = 10 mV 1.7
s
t
PLH
Propagation delay time, low-to-high output
C
L
= 15 pF
Overdrive = 20 mV 1.2
µs
Overdrive = 40 mV 1.0
V
I
= 1.4 V step at IN+ 1.1
Overdrive = 2 mV 3.6
f = 10 kHz,
Overdrive = 5 mV 2.1
t
PHL
Propagation delay time, high-to-low level output
f = 10 kHz,
C
L
= 15 pF
Overdrive = 10 mV 1.3
s
t
PHL
Propagation delay time, high-to-low level output
C
L
= 15 pF
Overdrive = 20 mV 0.85
µs
Overdrive = 40 mV 0.55
V
I
= 1.4 V step at IN+ 0.10
t
THL
Transition time, high-to-low level output
f = 10 kHz,
Overdrive = 50 mV
20
ns
t
THL
Transition time, high-to-low level output
f = 10 kHz,
C
L
= 15pF
Overdrive = 50 mV
20
ns
PARAMETER MEASUREMENT INFORMATION
The TLC139 and TLC339 contain a digital output stage that, if held in the linear region of the transfer curve, can cause
damage to the device. Conventional operational amplifier/comparator testing incorporates the use of a servo-loop
that is designed to force the device output to a level within this linear region. Since the servo-loop method of testing
cannot be used, the following alternatives for testing parameters such as input offset voltage, common-mode
rejection, etc., are suggested.
To verify that the input offset voltage falls within the limits specified, the limit value is applied to the input as shown
in Figure 1(a). With the noninverting input positive with respect to the inverting input, the output should be high. With
the input polarity reversed, the output should be low.
A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages can
be slewed as shown in Figure 1(b) for the V
ICR
test, rather than changing the input voltages, to provide greater
accuracy.
(a) V
IO
WITH V
IC
= 0 V (b) V
IO
WITH V
IC
= 4 V
5 V
1 V
5.1 kΩ
5.1 kΩ
Applied V
IO
Limit
Applied V
IO
Limit
V
O
V
O
−4 V
Figure 1. Method for Verifying That Input Offset Voltage Is Within Specified Limits