Datasheet

  
   
 
SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2652Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC2652C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
T
J
max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (7) IS INTERNALLY CONNECTED
TO BACK SIDE OF CHIP.
FOR THE PINOUT, SEE THE FUNCTIONAL
BLOCK DIAGRAM.
90
80
(13)
(12) (11) (10) (9)
(8)
(1)
(7)(5)(4)
(2)
(14)